1.3.2 Pin Assignments in Each Mode
Table 1-2 lists the pin assignments in each mode.
Table 1-2 Pin Assignments in Each Mode (FP-100B or TFP-100B)
Pin Name
PROM Mode
EPROM Flash
V
CC
Mode 1
Mode 2
Mode 3
Mode 4
Mode 5
Mode 6
Mode 7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
Notes: 1. In modes 1, 3, 5, and 6 the P4
0
to P4
7
functions of pins P4
0
/D
0
to P4
7
/D
7
are selected after a reset, but they can be changed by software.
2. In modes 2 and 4 the D
0
to D
7
functions of pins P4
0
/D
0
to P4
7
/D
7
are selected after a reset, but they can be changed by software.
3. Pins marked NC should be left unconnected.
4. For details about PROM mode see section 18, ROM.
V
CC
PB
0
/TP
8
/TIOCA
3
PB
1
/TP
9
/TIOCB
3
PB
2
/TP
10
/TIOCA
4
PB
3
/TP
11
/TIOCB
4
PB
4
/TP
12
/TOCXA
4
PB
5
/TP
13
/TOCXB
4
PB
6
/TP
14
/DREQ
0
/
CS
7
PB
7
/TP
15
/DREQ
1
/
ADTRG
RESO
V
SS
P9
0
/TxD
0
P9
1
/TxD
1
P9
2
/RxD
0
P9
3
/RxD
1
P9
4
/SCK
0
/IRQ
4
P9
5
/SCK
1
/IRQ
5
P4
0
/D
0
*
1
P4
1
/D
1
*
1
P4
2
/D
2
*
1
P4
3
/D
3
*
1
V
SS
P4
4
/D
4
*
1
P4
5
/D
5
*
1
P4
6
/D
6
*
1
P4
7
/D
7
*
1
D
8
D
9
D
10
D
11
D
12
D
13
D
14
V
CC
PB
0
/TP
8
/TIOCA
3
PB
1
/TP
9
/TIOCB
3
PB
2
/TP
10
/TIOCA
4
PB
3
/TP
11
/TIOCB
4
PB
4
/TP
12
/TOCXA
4
PB
5
/TP
13
/TOCXB
4
PB
6
/TP
14
/DREQ
0
/
CS
7
PB
7
/TP
15
/DREQ
1
/
ADTRG
RESO
V
SS
P9
0
/TxD
0
P9
1
/TxD
1
P9
2
/RxD
0
P9
3
/RxD
1
P9
4
/SCK
0
/IRQ
4
P9
5
/SCK
1
/IRQ
5
P4
0
/D
0
*
2
P4
1
/D
1
*
2
P4
2
/D
2
*
2
P4
3
/D
3
*
2
V
SS
P4
4
/D
4
*
2
P4
5
/D
5
*
2
P4
6
/D
6
*
2
P4
7
/D
7
*
2
D
8
D
9
D
10
D
11
D
12
D
13
D
14
V
CC
PB
0
/TP
8
/TIOCA
3
PB
1
/TP
9
/TIOCB
3
PB
2
/TP
10
/TIOCA
4
PB
3
/TP
11
/TIOCB
4
PB
4
/TP
12
/TOCXA
4
PB
5
/TP
13
/TOCXB
4
PB
6
/TP
14
/DREQ
0
/
CS
7
PB
7
/TP
15
/DREQ
1
/
ADTRG
RESO
V
SS
P9
0
/TxD
0
P9
1
/TxD
1
P9
2
/RxD
0
P9
3
/RxD
1
P9
4
/SCK
0
/IRQ
4
P9
5
/SCK
1
/IRQ
5
P4
0
/D
0
*
1
P4
1
/D
1
*
1
P4
2
/D
2
*
1
P4
3
/D
3
*
1
V
SS
P4
4
/D
4
*
1
P4
5
/D
5
*
1
P4
6
/D
6
*
1
P4
7
/D
7
*
1
D
8
D
9
D
10
D
11
D
12
D
13
D
14
V
CC
PB
0
/TP
8
/TIOCA
3
PB
1
/TP
9
/TIOCB
3
PB
2
/TP
10
/TIOCA
4
PB
3
/TP
11
/TIOCB
4
PB
4
/TP
12
/TOCXA
4
PB
5
/TP
13
/TOCXB
4
PB
6
/TP
14
/DREQ
0
/
CS
7
PB
7
/TP
15
/DREQ
1
/
ADTRG
RESO
V
SS
P9
0
/TxD
0
P9
1
/TxD
1
P9
2
/RxD
0
P9
3
/RxD
1
P9
4
/SCK
0
/IRQ
4
P9
5
/SCK
1
/IRQ
5
P4
0
/D
0
*
2
P4
1
/D
1
*
2
P4
2
/D
2
*
2
P4
3
/D
3
*
2
V
SS
P4
4
/D
4
*
2
P4
5
/D
5
*
2
P4
6
/D
6
*
2
P4
7
/D
7
*
2
D
8
D
9
D
10
D
11
D
12
D
13
D
14
V
CC
PB
0
/TP
8
/TIOCA
3
PB
1
/TP
9
/TIOCB
3
PB
2
/TP
10
/TIOCA
4
PB
3
/TP
11
/TIOCB
4
PB
4
/TP
12
/TOCXA
4
PB
5
/TP
13
/TOCXB
4
PB
6
/TP
14
/DREQ
0
/
CS
7
PB
7
/TP
15
/DREQ
1
/
ADTRG
RESO
V
SS
P9
0
/TxD
0
P9
1
/TxD
1
P9
2
/RxD
0
P9
3
/RxD
1
P9
4
/SCK
0
/IRQ
4
P9
5
/SCK
1
/IRQ
5
P4
0
/D
0
*
1
P4
1
/D
1
*
1
P4
2
/D
2
*
1
P4
3
/D
3
*
1
V
SS
P4
4
/D
4
*
1
P4
5
/D
5
*
1
P4
6
/D
6
*
1
P4
7
/D
7
*
1
D
8
D
9
D
10
D
11
D
12
D
13
D
14
V
CC
PB
0
/TP
8
/TIOCA
3
PB
1
/TP
9
/TIOCB
3
PB
2
/TP
10
/TIOCA
4
PB
3
/TP
11
/TIOCB
4
PB
4
/TP
12
/TOCXA
4
PB
5
/TP
13
/TOCXB
4
PB
6
/TP
14
/DREQ
0
/
CS
7
PB
7
/TP
15
/DREQ
1
/
ADTRG
RESO
V
SS
P9
0
/TxD
0
P9
1
/TxD
1
P9
2
/RxD
0
P9
3
/RxD
1
P9
4
/SCK
0
/IRQ
4
P9
5
/SCK
1
/IRQ
5
P4
0
/D
0
*
1
P4
1
/D
1
*
1
P4
2
/D
2
*
1
P4
3
/D
3
*
1
V
SS
P4
4
/D
4
*
1
P4
5
/D
5
*
1
P4
6
/D
6
*
1
P4
7
/D
7
*
1
D
8
D
9
D
10
D
11
D
12
D
13
D
14
V
CC
PB
0
/TP
8
/TIOCA
3
PB
1
/TP
9
/TIOCB
3
PB
2
/TP
10
/TIOCA
4
PB
3
/TP
11
/TIOCB
4
PB
4
/TP
12
/TOCXA
4
PB
5
/TP
13
/TOCXB
4
PB
6
/TP
14
/DREQ
0
PB
7
/TP
15
/DREQ
1
/
ADTRG
RESO
V
SS
P9
0
/TxD
0
P9
1
/TxD
1
P9
2
/RxD
0
P9
3
/RxD
1
P9
4
/SCK
0
/IRQ
4
P9
5
/SCK
1
/IRQ
5
P4
0
P4
1
P4
2
P4
3
V
SS
P4
4
P4
5
P4
6
P4
7
P3
0
P3
1
P3
2
P3
3
P3
4
P3
5
P3
6
V
CC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
V
PP
V
PP
V
SS
V
SS
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
V
SS
V
SS
NC
NC
NC
NC
NC
NC
NC
NC
EO
0
I/O
0
EO
1
I/O
1
EO
2
I/O
2
EO
3
I/O
3
EO
4
I/O
4
EO
5
I/O
5
EO
6
I/O
6
Pin
No.
7