參數(shù)資料
型號： HC05K3GRS
英文描述： 68HC05K3 General Release Specification
中文描述： 68HC05K3一般版本規(guī)范
文件頁數(shù)： 29/132頁
文件大?。?/td> 1188K
代理商： HC05K3GRS
Memory Map
Input/Output and Control Registers
MC68HC05K3 — Revision 4.0
TechnicalData
MOTOROLA
Memory Map
29
2.3 Input/Output and Control Registers
The input/output (I/O) and status/control registers reside in locations
$0000–$001F. The overall organization of these registers is shown in
Figure 2-2
.
The bit assignments for each register are shown in
Figure 2-3
. Reading
unimplemented bits returns unknown states, and writing to
unimplemented bits has no effect.
Figure 2-2. MC68HC05K3 I/O Registers Memory Map
PORT A DATA REGISTER
PORT B DATA REGISTER
PORT A DATA DIRECTION REGISTER
PORT B DATA DIRECTION REGISTER
TIMER STATUS & CONTROL REGISTER
TIMER COUNTER REGISTER
PEEPROMCONTROL & STATUS REGISTER
RESERVED
UNIMPLEMENTED (2)
UNIMPLEMENTED (2)
UNIMPLEMENTED (3)
UNIMPLEMENTED (13)
IRQ STATUS & CONTROL REGISTER
PORT A PULLDOWN REGISTER
PORT B PULLDOWN REGISTER
$0000
$0001
$0004
$0005
$0008
$0009
$001F
$000A
$0010
$0011
$000F
PEEPROMBIT SELECT REGISTER
$000E
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