參數(shù)資料
型號(hào)： FTS64K
廠商： 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述： 50/MDR/RECP/VERT PRS FIT/M2.6/SCW/30 MIN
中文描述： 64K的快閃記憶體字節(jié)
文件頁(yè)數(shù)： 24/44頁(yè)
文件大?。?/td> 401K
代理商： FTS64K
FTS64K Block User Guide — Version V01.00
24
NV6 — Non Volatile Flag Bit.
This bit is available as non-volatile flag.
3.3.6 FSTAT — Flash Status Register
The FSTAT register defines the Flash state machine command status and Flash array access, protection
and blank verify status.
Figure 3-7 Flash Status Register (FSTAT)
RegisterbitsCBEIF,PVIOLandACCERRarereadableandwritable,bitsCCIFandBLANKarereadable
and not writable, bits 3, 1 and 0 read zero and are not writable.
CBEIF — Command Buffer Empty Interrupt Flag.
The CBEIF flag indicates that the address, data and command buffers are empty so that a new
command sequence can be started. The CBEIF flag is cleared by writing a “1” to CBEIF. Writing a
“0” to the CBEIF flag has no effect on CBEIF but sets ACCERR, which can be used to abort a
command sequence. This bit, CBEIF, is used together with the enable bit CBEIE, to generate the
interrupt request (see also
Figure 6-1
).
1 = Buffers are ready to accept a new command.
0 = Buffers are full.
CCIF — Command Complete Interrupt Flag.
Table 3-6 Flash Lower Address Range Protection
FPLS
Protected
Address
Range
Protected Size
00
see
Table 3-2
512 Bytes
01
1K
10
2K
11
4K
Register address BASE + $105
7
R
CBEIF
W
Reset:
1
6
5
4
3
0
2
1
0
0
0
CCIF
PVIOL
ACCERR
BLANK
1
0
0
0
0
0
0
= Unimplemented or Reserved
F
For More Information On This Product,
Go to: www.freescale.com
n
.
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