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參數(shù)資料
| 型號： | FTS64K |
| 廠商： | 飛思卡爾半導體(中國)有限公司 |
| 英文描述： | 50/MDR/RECP/VERT PRS FIT/M2.6/SCW/30 MIN |
| 中文描述： | 64K的快閃記憶體字節(jié) |
| 文件頁數(shù)： | 21/44頁 |
| 文件大?。?/td> | 401K |
| 代理商： | FTS64K |
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21
The FSEC register is loaded from the Flash Protection/Options field byte at $FF0F during the reset
sequence, indicated by “F” in
Figure 3-3
.
KEYEN — Enable backdoor key to security.
1 = backdoor to Flash is enabled.
0 = backdoor to Flash is disabled.
NV[6:2] — Non Volatile Flag Bits.
These 5 bits are available to the user as non-volatile flags.
SEC[1:0] — Memory Security Bits.
The SEC[1:0] bits define the security state of the device as shown in
Table 3-4
. If the Flash is
unsecured using the Backdoor Key Access, the SEC bits are forced to 10.
The security function in the Flash module is described in section
4.5
.
3.3.3 RESERVED1
This register is reserved and is not accessible to the user.
Register address BASE + $102
Figure 3-4 RESERVED 1
Table 3-4 Security States
SEC[1:0]
Description
00
secured
01
secured
10
unsecured
11
secured
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
0
R
W
Reset:
0
0
0
0
0
0
0
0
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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