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參數(shù)資料
| 型號： | FLEX10K |
| 廠商： | Altera Corporation |
| 英文描述： | Embedded Programmable Logic Family |
| 中文描述： | 嵌入式可編程邏輯系列 |
| 文件頁數(shù)： | 36/114頁 |
| 文件大?。?/td> | 1422K |
| 代理商： | FLEX10K |
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36
Altera Corporation
FLEX 10K Embedded Programmable Logic Family Data Sheet
Slew-Rate Control
The output buffer in each IOE has an adjustable output slew rate that can
be configured for low-noise or high-speed performance. A slower slew
rate reduces system noise and adds a maximum delay of approximately
2.9 ns. The fast slew rate should be used for speed-critical outputs in
systems that are adequately protected against noise. Designers can specify
the slew rate on a pin-by-pin basis during design entry or assign a default
slew rate to all pins on a device-wide basis. The slow slew rate setting
affects only the falling edge of the output. Each pin can also be specified
as open-drain on a pin-by-pin basis. Additionally, the MAX+PLUS II
software can automatically convert tri-state buffers with grounded data
inputs to open-drain pins.
Open-Drain Output Option
FLEX 10K devices provide an optional open-drain (electrically equivalent
to open-collector) output for each I/O pin. This open-drain output
enables the device to provide system-level control signals (e.g., interrupt
and write enable signals) that can be asserted by any of several devices. It
can also provide an additional wired-
OR
plane.
Open-drain output pins on FLEX10K devices (with a pull-up resistor to
the 5.0-V supply) can drive 5.0-V CMOS input pins that require a V
IH
of
3.5 V. When the open-drain pin is active, it will drive low. When the pin
is inactive, the trace will be pulled up to 5.0 V by the resistor. The open-
drain pin will only drive low or tri-state, never high. Therefore, a
connection will not exist between the 3.3-V and 5.0-V power supplies. The
rise time is dependent on the value of the pull-up resistor and load
impedance. The I
OL
current specification should be considered when
selecting a pull-up resistor.
MultiVolt I/O Interface
The FLEX 10K device architecture supports the MultiVolt I/O interface
feature, which allows FLEX 10K, and FLEX 10KA, and FLEX 10KE devices
to interface with systems of differing supply voltages. These devices have
one set of V
CC
pins for internal operation and input buffers (
VCCINT
), and
another set for I/O output drivers (
VCCIO
).
Table 11 describes the FLEX 10K device supply voltages and MultiVolt
I/O support levels.
相關PDF資料 |
PDF描述 |
|---|---|
| FLEX10KA | Embedded Programmable Logic Family |
| FLEX10KE | Embedded Programmable Logic Family |
| FLEX6000 | Programmable Logic Device Family |
| FLEX8000 | PROGRAMMABLE LOGIC DEVICES FAMILY |
| FLL120MK | L-Band Medium & High Power GaAs FET |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| FLEX10K_03 | 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:Embedded Programmable Logic Device Family |
| FLEX10KA | 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:Embedded Programmable Logic Family |
| FLEX10KE | 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:Embedded Programmable Logic Device |
| FLEX110 | 功能描述:開發(fā)板和工具包 - PIC / DSPIC Multibus Pack RoHS:否 制造商:Microchip Technology 產(chǎn)品:Starter Kits 工具用于評估:chipKIT 核心:Uno32 接口類型: 工作電源電壓: |
| FLEX111 | 功能描述:開發(fā)板和工具包 - PIC / DSPIC Fasttrack suite RoHS:否 制造商:Microchip Technology 產(chǎn)品:Starter Kits 工具用于評估:chipKIT 核心:Uno32 接口類型: 工作電源電壓: |
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