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參數(shù)資料
| 型號： | EPM3256ATI144-6 |
| 廠商： | ALTERA CORP |
| 元件分類： | PLD |
| 英文描述： | EE PLD, 6 ns, PQFP144 |
| 封裝： | TQFP-144 |
| 文件頁數(shù)： | 20/43頁 |
| 文件大?。?/td> | 716K |
| 代理商： | EPM3256ATI144-6 |
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Altera Corporation
27
MAX 3000A Programmable Logic Device Family Data Sheet
Preliminary Information
Notes to tables:
(1)
These values are specified under the recommended operating conditions, as shown in Table 10 on page 19.
(2)
MAX 3000A timing values are preliminary.
(3)
These values are specified for a PIA fan-out of one LAB (16 macrocells). For each additional LAB fan-out in these
devices, add an additional 0.1 ns to the PIA timing value.
(4)
This minimum pulse width for preset and clear applies for both global clear and array controls. The tLPA parameter
must be added to this minimum width if the clear or reset signal incorporates the tLAD parameter into the signal
path.
(5)
Measured with a 16-bit loadable, enabled, up/down counter programmed into each LAB.
(6)
The fMAX values represent the highest frequency for pipelined data.
(7)
Operating conditions: VCCIO = 2.5 ± 0.2 V for commercial and industrial use.
(8)
The tLPA parameter must be added to the tLAD, tCPPW, tLAC, tIC, tACL, tEN, and tSEXP parameters for macrocells
running in low-power mode.
Power
Consumption
Supply power (P) versus frequency (fMAX, in MHz) for MAX 3000A
devices is calculated with the following equation:
P = PINT + PIO = ICCINT × VCC + PIO
The PIO value, which depends on the device output load characteristics
and switching frequency, can be calculated using the guidelines given in
The ICCINT value depends on the switching frequency and the application
logic. The ICCINT value is calculated with the following equation:
ICCINT =
(A
× MC
TON) + [B × (MCDEV – MCTON)] + (C × MCUSED × fMAX × togLC)
The parameters in this equation are:
MCTON
=
Number of macrocells with the Turbo BitTM option turned
on, as reported in the MAX+PLUS II Report File (.rpt)
MCDEV
=
Number of macrocells in the device
MCUSED = Total number of macrocells in the design, as reported in
the Report File
fMAX
=
Highest clock frequency to the device
togLC
=
Average percentage of logic cells toggling at each clock
(typically 12.5%)
A, B, C
=
Constants, shown in Table 17
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