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參數(shù)資料
| 型號： | EP910 |
| 廠商： | Altera Corporation |
| 英文描述： | Classic EPLD Family(典型EPLD系列器件) |
| 中文描述： | 經(jīng)典系列可編程邏輯器件（典型可編程邏輯器件系列器件） |
| 文件頁數(shù)： | 7/15頁 |
| 文件大?。?/td> | 227K |
| 代理商： | EP910 |
Altera Corporation
975
AN 78: Understanding MAX 5000 & Classic Timing
Figure 4. External Timing Parameters (Part 1 of 3)
Combinatorial
Logic
Combinatorial Delay
Combinatorial
Logic
Tri-State Enable/Disable Delay
Register Clear & Preset Time
MAX 5000
CLR
t
PRE
,
t
CLR
=
t
IN
+t
LAC
+(t
PRE
or t
) +t
OD
t
CLR
=
t
IN
+t
CLR
+t
OD
Classic
MAX 5000 (multi-LAB)
MAX 5000 (single-LAB)
PD2
IO
t
IN
t
LAD
COMB
+t
COMB
+t
OD
Classic
MAX 5000
Classic
ZX
t
PXZ
,
t
PZX
=
t
IN
+t
LAD
+(t
XZ
or t
)
ZX
t
PXZ
,
t
PZX
=
t
IN
+t
LAC
+(t
XZ
or t
)
PD2
IO
IN
LAD
OD
t
PD1
t
=
=
t
IN
+t
LAD
+t
OD
t
+t
+t
+t
t
t
=
=
+t
+t
+t
PD1
LAD
OD
t
PD1
t
=
=
t
IN
+t
LAD
+t
COMB
+t
OD
t
+t
+t
+t
PD2
IO
PIA
LAD
COMB
+t
OD
+t
Combinatorial
Logic
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相關代理商/技術參數(shù) |
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|---|---|
| EP9100 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Tapped Delay Line |
| EP9100-RC | 制造商:PCA 制造商全稱:PCA ELECTRONICS INC. 功能描述:28 Pin SMD 5 Tap TTL Compatible Active Delay Lines |
| EP9101 | 制造商:PCA 制造商全稱:PCA ELECTRONICS INC. 功能描述:28 Pin SMD 5 Tap TTL Compatible Active Delay Lines |
| EP9101-RC | 制造商:PCA 制造商全稱:PCA ELECTRONICS INC. 功能描述:28 Pin SMD 5 Tap TTL Compatible Active Delay Lines |
| EP9102 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Tapped Delay Line |
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