參數(shù)資料
型號(hào): EP3SL340F1760C3N
廠商: Altera
文件頁數(shù): 5/16頁
文件大?。?/td> 0K
描述: IC STRATIX III L 340K 1760-FBGA
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝: 3
系列: Stratix® III
LAB/CLB數(shù): 13500
邏輯元件/單元數(shù): 337500
RAM 位總計(jì): 18822144
輸入/輸出數(shù): 1120
電源電壓: 0.86 V ~ 1.15 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 1760-BBGA,F(xiàn)CBGA
供應(yīng)商設(shè)備封裝: 1760-FCBGA
Chapter 1: Stratix III Device Family Overview
1–13
Reference and Ordering Information
Signal Integrity
Stratix III devices simplify the challenge of signal integrity through a number of chip,
package, and board level enhancements to enable efficient high-speed data transfer
into and out of the device. These enhancements include:
8:1:1 user I/O/Gnd/VCC ratio to reduce the loop inductance in the package
Dedicated power supply for each I/O bank, limit of I/Os is 24 to 48 I/Os per bank,
to help limit simultaneous switching noise
Programmable slew-rate support with up to four settings to match desired I/O
standard, control noise, and overshoot
Programmable output-current drive strength support with up to six settings to
match desired I/O standard performance
Programmable output-delay support to control rise/fall times and adjust duty
cycle, compensate for skew, and reduce simultaneous switching outputs (SSO)
noise
Dynamic OCT with auto calibration support for series and parallel OCT and
differential OCT support for LVDS I/O standard on the left/right banks
f For more information about SI support in the Quartus II software, refer to the
f For more information about how to use the various configuration, PLL, external
memory interfaces, I/O, high-speed differential I/O, power, and JTAG pins, refer to
Reference and Ordering Information
The following section describes Stratix III device software support and ordering
information.
Software Support
Stratix III devices are supported by the Altera Quartus II design software, version 6.1
and later, which provides a comprehensive environment for
system-on-a-programmable-chip (SOPC) design. The Quartus II software includes
HDL and schematic design entry, compilation and logic synthesis, full simulation and
advanced timing analysis, SignalTap II logic analyzer, and device configuration.
f For more information about the Quartus II software features, refer to the Quartus II
The Quartus II software supports a variety of operating systems. The specific
operating system for the Quartus II software can be obtained from the Quartus II
Readme.txt
file or the Operating System Support section of the Altera website. It also
supports seamless integration with industry-leading EDA tools through the
NativeLink interface.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EP3SL340F1760C3NES 制造商:Altera Corporation 功能描述:IC FPGA 1120 I/O 1760FBGA 制造商:Altera Corporation 功能描述:IC STRATIX III L FPGA 1760FBGA
EP3SL340F1760C4 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix III 13500 LABs 1120 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP3SL340F1760C4L 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix III 13500 LABs 1120 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP3SL340F1760C4LN 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix III 13500 LABs 1120 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP3SL340F1760C4N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix III 13500 LABs 1120 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256