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參數(shù)資料
| 型號： | EP3SL340F1760C3N |
| 廠商： | Altera |
| 文件頁數(shù)： | 14/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC STRATIX III L 340K 1760-FBGA |
| 產(chǎn)品培訓(xùn)模塊： | Three Reasons to Use FPGA's in Industrial Designs |
| 標(biāo)準(zhǔn)包裝： | 3 |
| 系列： | Stratix® III |
| LAB/CLB數(shù)： | 13500 |
| 邏輯元件/單元數(shù)： | 337500 |
| RAM 位總計： | 18822144 |
| 輸入/輸出數(shù)： | 1120 |
| 電源電壓： | 0.86 V ~ 1.15 V |
| 安裝類型： | 表面貼裝 |
| 工作溫度： | 0°C ~ 85°C |
| 封裝/外殼： | 1760-BBGA，F(xiàn)CBGA |
| 供應(yīng)商設(shè)備封裝： | 1760-FCBGA |
Chapter 1: Stratix III Device Family Overview
1–7
Architecture Features
MultiTrack Interconnect
In the Stratix III architecture, connections between ALMs, TriMatrix memory, DSP
blocks, and device I/O pins are provided by the MultiTrack interconnect structure
with DirectDrive technology. The MultiTrack interconnect consists of continuous,
performance-optimized row and column interconnects that span fixed distances. A
routing structure with fixed length resources for all devices allows predictable and
repeatable performance when migrating through different device densities. The
MultiTrack interconnect provides 1-hop connection to 34 adjacent LABs, 2-hop
connections to 96 adjacent LABs and 3-hop connections to 160 adjacent LABs.
DirectDrive technology is a deterministic routing technology that ensures identical
routing resource usage for any function regardless of placement in the device. The
MultiTrack interconnect and DirectDrive technology simplify the integration stage of
block-based designing by eliminating the reoptimization cycles that typically follow
design changes and additions. The Quartus II Compiler also automatically places
critical design paths on faster interconnects to improve design performance.
f For more information, refer to the MultiTrack Interconnect in Stratix III Devices chapter.
TriMatrix Embedded Memory Blocks
TriMatrix embedded memory blocks provide three different sizes of embedded
SRAM to efficiently address the needs of Stratix III FPGA designs. TriMatrix memory
includes the following blocks:
■
320-bit MLAB blocks optimized to implement filter delay lines, small FIFO buffers,
and shift registers
■
9-Kbit M9K blocks that can be used for general purpose memory applications
■
144-Kbit M144K blocks that are ideal for processor code storage, packet and video
frame buffering
Each embedded memory block can be independently configured to be a single- or
dual-port RAM, ROM, or shift register via the Quartus II MegaWizardTM Plug-In
Manager. Multiple blocks of the same type can also be stitched together to produce
larger memories with minimal timing penalty. TriMatrix memory provides up to
16,272 Kbits of embedded SRAM at up to 600 MHz operation.
f For more information about TriMatrix memory blocks, modes, features, and design
considerations, refer to the TriMatrix Embedded Memory Blocks in Stratix III Devices
chapter.
DSP Blocks
Stratix III devices have dedicated high-performance digital signal processing (DSP)
blocks optimized for DSP applications requiring high data throughput. Stratix III
devices provide you with the ability to implement various high-performance DSP
functions easily. Complex systems such as WiMAX, 3GPP WCDMA, CDMA2000,
voice over Internet Protocol (VoIP), H.264 video compression, and high-definition
television (HDTV) require high-performance DSP blocks to process data. These
system designs typically use DSP blocks to implement finite impulse response (FIR)
filters, complex FIR filters, infinite impulse response (IIR) filters, fast Fourier
transform (FFT) functions, and discrete cosine transform (DCT) functions.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EP3SL340F1760C3NES | 制造商:Altera Corporation 功能描述:IC FPGA 1120 I/O 1760FBGA 制造商:Altera Corporation 功能描述:IC STRATIX III L FPGA 1760FBGA |
| EP3SL340F1760C4 | 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix III 13500 LABs 1120 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256 |
| EP3SL340F1760C4L | 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix III 13500 LABs 1120 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256 |
| EP3SL340F1760C4LN | 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix III 13500 LABs 1120 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256 |
| EP3SL340F1760C4N | 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix III 13500 LABs 1120 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256 |
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