參數(shù)資料
型號(hào): EM78569
廠商: ELAN Microelctronics Corp .
英文描述: 8-BIT MICRO-CONTROLLER
中文描述: 8位微控制器
文件頁(yè)數(shù): 26/53頁(yè)
文件大?。?/td> 461K
代理商: EM78569
EM78569
8-bit Micro-controller
__________________________________________________________________________________________________________________________________________________________________
* This specification is subject to be changed without notice.
8/31/2004 (V4.0)
The controller can drive LCD directly. The LCD block is made up of common driver, segment driver,
display LCD RAM, common output pins, segment output pins and LCD operating power supply. The basic
structure contains a timing control. This timing control uses the basic frequency 32.768KHz to generate the
proper timing for different duty and display access.
RD PAGE0 Bit 0 ~ Bit 2 are LCD control bits for LCD driver. These LCD control bits determine the duty,
the number of common and the frame frequency. The LCD display (disable, enable, blanking) is controlled
by Bit 1 and Bit 2. The driving duty is decided by Bit 0. The display data is stored in LCD RAM which
address and data access controlled by registers R5 PAGE1 and R6 PAGE1.
User can regulate the contrast of LCD display by IOC5 PAGE0 Bit 0 ~ Bit 3 (BIAS0 ~ BIAS3). Up to 16
levels contrast is convenient for better display.
Bit 3, Bit 7 :
(undefined) not allowed to use
Bit5 and Bit6 are only exist in EM78569’s developing tool(ICE569). In OTP and mask chip, these
two bits will mapping to code option. Please set these two bits to fixed value at initial and do not change
these two bit among your program design. Besides, please set bit4 to 1 or AD function will difference
between ICE 569 and EM78P569
Bit 4: Always set this bit to 1.
Bit 5(PHO) : PCO status select.
0
PC0 defined to normal IO.
1
PC0 defined to phase1 output.(VERSEL must = 1)
Bit 6(VERSEL) : Version select.
VERSEL = 0
Data RAM address
R8 page1
Data ram address auto-
increase
“ADD” & “SUB”
include “carry“ bit
Phase CLK output
Not support
VERSEL = 1
RB page2
Enable
Not support
Not support
Determined by RA page2 bit7
Phase1 CLK out from PC0
(determined by PHO)
PAGE1 (Counter2 data register)
Bit7
Bit6
CN27
CN26
R/W
R/W
Bit 0 ~ Bit 7 (CN20 ~ CN27) : Counter2's buffer that user can read and write.
Counter2 is a 8-bit up-counter with 8-bit prescaler that user can use RD PAGE1 to preset and read the
counter.(write
preset) After a interruption, it will reload the preset value.
Example for writing :
MOV 0x0D, A ; write the data at accumulator to counter2 (preset)
Example for reading :
MOV A, 0x0D ; read the data at counter2 to accumulator
Bit5
CN25
R/W
Bit4
CN24
R/W
Bit3
CN23
R/W
Bit2
CN22
R/W
Bit1
CN21
R/W
Bit0
CN20
R/W
相關(guān)PDF資料
PDF描述
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