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EM78569
8-bit Micro-controller
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* This specification is subject to be changed without notice.
8/31/2004 (V4.0)
R4 (RAM selection for common registers R20 ~ R3F))
(RAM selection register)
7
6
5
RB1
RB0
RSR5
R/W-0
R/W-0
R/W
Bit 0 ~ Bit 5 (RSR0 ~ RSR5) : Indirect addressing for common registers R20 ~ R3F
RSR bits are used to select up to 32 registers (R20 to R3F) in the indirect addressing mode.
Bit 6 ~ Bit 7 (RB0 ~ RB1) : Bank selection bits for common registers R20 ~ R3F
These selection bits are used to determine which bank is activated among the 4 banks for 32 register (R20 to
R3F)..
Please refer to VII.1 Operational registers for details.
R5 (PORT5 I/O data, Program page selection, LCD address, SPI control)
7
6
5
4
3
P57
P56
P55
-
PS3
PS2
R/W
R/W
R/W
R/W-0
R/W-0
Bit 0 ~ Bit 3 (PS0 ~ PS3) : Program page selection bits
PS3
PS2
PS1
PS0
Program memory page (Address)
0
0
0
0
Page 0
0
0
0
1
Page 1
0
0
1
0
Page 2
0
0
1
1
Page 3
:
:
:
:
:
:
:
:
:
:
1
1
1
0
Page 14
1
1
1
1
Page 15
User can use PAGE instruction to change page to maintain program page by user. Otherwise, user can use
far jump (FJMP) or far call (FCALL) instructions to program user's code. And the program page is
maintained by EMC's complier. It will change user's program by inserting instructions within program.
Bit 4 : unused
Bit 5 ~ Bit 7 (P55 ~ P57) : 8-bit PORT5(5~7) I/O data register
User can use IOC register to define input or output each bit.
PAGE1 (LCD address)
7
6
5
4
3
DA9
DA8
-
-
LCDA3
R/W-0
R/W-0
R/W-0
Bit 0 ~ Bit 3 (LCDA0 ~ LCDA3) : LCD address for LCD RAM read or write
The address of the LCD RAM correspond to the COMMON and SEGMENT signals as the table.
COM3 ~ COM0
LCD address
(LCDA3 ~ LCDA0)
SEG1, SEG0
00H
SEG3, SEG2
01H
SEG5, SEG4
02H
SEG7, SEG6
03H
SEG9, SEG8
04H
SEG11, SEG10
05H
SEG13, SEG12
06H
SEG15, SEG14
07H
4
3
2
1
0
RSR4
R/W
RSR3
R/W
RSR2
R/W
RSR1
R/W
RSR0
R/W
2
1
0
PS1
R/W-0
PS0
R/W-0
2
1
0
LCDA2
R/W-0
LCDA1
R/W-0
LCDA0
R/W-0