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EM78569
8-bit Micro-controller
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* This specification is subject to be changed without notice.
8/31/2004 (V4.0)
SEG13
SEG15
SEG17
SEG19
SEG21
SEG23
SEG25
SEG27
SEG29
SEG31
SEG12
SEG14
SEG16
SEG18
SEG20
SEG22
SEG24
SEG26
SEG28
SEG30
06H
07H
08H
09H
0AH
0BH
0CH
0DH
0EH
0FH
PAGE2 (SPI data buffer)
7
SPIB7
R/W
Bit 0 ~ Bit 7 (SPIB0 ~ SPIB7) : SPI data buffer
If you write data to this register, the data will write to SPIW register. If you read this data, it will read the
data from SPIR register. Please refer to figure7
PAGE3 (DT1L: the Least Significant Byte ( Bit 7 ~ Bit 0) of Duty Cycle of PWM1)
7
6
5
4
3
PWM1[7] PWM1[6] PWM1[5] PWM1[4] PWM1[3] PWM1[2] PWM1[1] PWM1[0]
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
A specified value keeps the output of PWM1 to stay at high until the value matches with TMR1.
R7 (PORT7 I/O data, Data RAM bank)
PAGE0 (PORT7 I/O data register)
7
6
5
4
3
P77
P76
P75
P74
P73
R/W
R/W
R/W
R/W
R/W
Bit 0 ~ Bit 7 (P70 ~ P77) : 8-bit PORT7(0~7) I/O data register
User can use IOC register to define input or output each bit.
PAGE1 (Data RAM bank selection bits)
7
6
5
4
3
-
AD9
AD8
DARES
R
R
R/W-0
Bit 0~Bit 1 (RAM_B0~RAM_B1) : Data RAM bank selection bits
Each bank has address 0 ~ address 255 which is total 256 (0.25k) bytes RAM size.
Data RAM bank selection : (Total RAM = 1K)
RAM_B1
RAM_B0
PAGE
0
0
PAGE0
0
1
PAGE1
1
0
PAGE2
1
1
PAGE3
Bit 2(ADRES):
Resolution selection for ADC
0
ADC is 8-bit resolution
When 8-bit resolution is selected, the most significant(MSB) 8-bit data output of the internal 10-bit ADC
will be mapping to RB PAGE1 so R7 PAGE1 bit 4 ~5 will be of no use.
1
ADC is 10-bit resolution
When 10-bit resolution is selected, 10-bit data output of the internal 10-bit ADC will be exactly mapping
to RB PAGE1 and R7 PAGE1 bit 4 ~5.
6
5
4
3
2
1
0
SPIB6
R/W
SPIB5
R/W
SPIB4
R/W
SPIB3
R/W
SPIB2
R/W
SPIB1
R/W
SPIB0
R/W
2
1
0
R/W-0
R/W-0
R/W-0
2
1
0
P72
R/W
P71
R/W
P70
R/W
2
1
0
ADRES
R/W-0
RAM_B1
R/W-0
RAM_B0
R/W-0