參數(shù)資料
型號: E28F004BX-T120
廠商: INTEL CORP
元件分類: PROM
英文描述: OSC 5V SMT PLAS 14X9 CMOS
中文描述: 512K X 8 FLASH 12V PROM, 120 ns, PDSO40
封裝: 20 X 10 MM, TSOP-40
文件頁數(shù): 42/50頁
文件大小: 449K
代理商: E28F004BX-T120
28F400BX-TB 28F004BX-TB
AC CHARACTERISTICSCE -CONTROLLED WRITE OPERATIONS(1 9) (Continued)
Versions
VCC g 5%
28F400BX-60(10)
Unit
28F004BX-60(10)
VCC g10%
28F400BX-60(11)
28F400BX-80(11) 28F400BX-120(11)
28F004BX-60(11)
28F004BX-80(11) 28F004BX-120(11)
Symbol
Parameter
Notes
Min
Max
Min
Max
Min
Max
Min
Max
tIR Input Rise Time
10
ns
tIF Input Fall Time
10
ns
NOTES
1 Chip-Enable Controlled Writes Write operations are driven by the valid combination of CE
and WE
in systems where
CE
defines the write pulse-width (within a longer WE
timing waveform) all set-up hold and inactive WE
times
should be measured relative to the CE
waveform
2 3 4 5 6 7 8 Refer to AC Characteristics notes for WE -Controlled Write Operations
9 Read timing characteristics during write and erase operations are the same as during read-only operations Refer to AC
Characteristics during Read Mode
10 See High Speed Test Configuration
11 See Standard Test Configuration
EXTENDED TEMPERATURE OPERATION
AC CHARACTERISTICSCE -CONTROLLED WRITE OPERATIONS(1 9)
Versions
T28F400BX-80(10)
T28F004BX-80(10)
Unit
Symbol
Parameter
Notes
Min
Max
tAVAV
tWC
Write Cycle Time
80
ns
tPHEL
tPS
RP
High Recovery to CE
Going Low
220
ns
tWLEL
tWS
WE
Setup to CE
Going Low
0
ns
tPHHEH
tPHS
RP
VHH Setup to CE
Going High
6 8
100
ns
tVPEH
tVPS
VPP Setup to CE
Going High
5 8
100
ns
tAVEH
tAS
Address Setup to CE
Going High
3
60
ns
tDVEH
tDS
Data Setup to CE
Going High
4
60
ns
tELEH
tCP
CE
Pulse Width
60
ns
tEHDX
tDH
Data Hold from CE
High
4
0
ns
tEHAX
tAH
Address Hold from CE
High
3
10
ns
tEHWH
tWH
WE
Hold from CE
High
10
ns
tEHEL
tCPH
CE
Pulse Width High
20
ns
tEHQV1
Duration of WordByte Programming
2 5
7
m
s
Operation
47
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