參數(shù)資料
型號: DSP56F805E
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: 16-bit Digital Signal Controllers
中文描述: 16位數(shù)字信號控制器
文件頁數(shù): 15/56頁
文件大?。?/td> 415K
代理商: DSP56F805E
Serial Peripheral Interface (SPI) Signals
56F805 Technical Data, Rev. 15
Freescale Semiconductor
15
2.8 Serial Peripheral Interface (SPI) Signals
Table 2-12 Serial Peripheral Interface (SPI) Signals
No. of
Pins
Signal
Name
Signal
Type
State During
Reset
Signal Description
1
MISO
GPIOE6
Input/
Output
Input/
Output
Input
Input
SPI Master In/Slave Out (MISO)
—This serial data pin is an input to
a master device and an output from a slave device. The MISO line
of a slave device is placed in the high-impedance state if the slave
device is not selected.
Port E GPIO
—This pin is a General Purpose I/O (GPIO) pin that
can individually be programmed as an input or output pin.
After reset, the default state is MISO.
1
MOSI
GPIOE5
Input/
Output
Input/
Output
Input
Input
SPI Master Out/Slave In (MOSI)
—This serial data pin is an output
from a master device and an input to a slave device. The master
device places data on the MOSI line a half-cycle before the clock
edge that the slave device uses to latch the data.
Port E GPIO
—This General Purpose I/O (GPIO) pin can be
individually programmed as an input or output pin.
After reset, the default state is MOSI.
1
SCLK
GPIOE4
Input/
Output
Input/
Output
Input
Input
SPI Serial Clock
—In master mode, this pin serves as an output,
clocking slaved listeners. In slave mode, this pin serves as the data
clock input.
Port E GPIO
—This General Purpose I/O (GPIO) pin can be
individually programmed as an input or output pin.
After reset, the default state is SCLK.
1
SS
GPIOE7
Input
Input/
Output
Input
Input
SPI Slave Select
—In master mode, this pin is used to arbitrate
multiple masters. In slave mode, this pin is used to select the slave.
Port E GPIO
—This General Purpose I/O (GPIO) pin can be
individually programmed as an input or output pin.
After reset, the default state is SS.
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