參數(shù)資料
型號: DSP56852E
廠商: 飛思卡爾半導體(中國)有限公司
英文描述: 16-bit Digital Signal Controllers
中文描述: 16位數(shù)字信號控制器
文件頁數(shù): 37/48頁
文件大?。?/td> 731K
代理商: DSP56852E
Serial Communication Interface (SCI) Timing
56852 Technical Data, Rev. 8
Freescale Semiconductor
37
4.11 Serial Communication Interface (SCI) Timing
Figure 4-24 RXD Pulse Width
Figure 4-25 TXD Pulse Width
Figure 4-26 Bus Wake-up Detection
Table 4-13 SCI Timing
4
Operating Conditions: V
SS
= V
SSIO
= V
SSA
= 0V, V
DD
= 1.62-1.98V, V
DDIO
= V
DDA
= 3.0–3.6V, T
A
= –40
°
to +120
°
C, C
L
50pF, f
op
= 120MHz
Characteristic
Symbol
Min
Max
Unit
Baud Rate
1
1.
f
MAX
is the frequency of operation of the system clock in MHz.
The RXD pin in SCI0 is named RXD0 and the RXD pin in SCI1 is named RXD1.
BR
(f
MAX
)/(32)
Mbps
RXD
2
Pulse Width
2.
RXD
PW
0.965/BR
1.04/BR
ns
TXD
3
Pulse Width
3.
The TXD pin in SCI0 is named TXD0 and the TXD pin in SCI1 is named TXD1.
4.
Parameters listed are guaranteed by design.
TXD
PW
0.965/BR
1.04/BR
ns
RXD
SCI receive
data pin
(Input)
RXD
PW
TXD
SCI receive
data pin
(Input)
TXD
PW
MSCAN_RX
CAN receive
data pin
(Input)
T
WAKE-UP
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