參數(shù)資料
型號: DSP56800ERM
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: 16-bit Digital Signal Controllers
中文描述: 16位數(shù)字信號控制器
文件頁數(shù): 8/124頁
文件大?。?/td> 1880K
代理商: DSP56800ERM
56F8013 Technical Data, Rev. 2
8
Freescale Semiconductor
Preliminary
Figure 1-1 System Bus Interfaces
Note:
Flash memories are encapsulated within the Flash Interface Unit (FIU). Flash control is accomplished
by the I/O to the FIU over the peripheral bus, while reads and writes are completed between the core
and the Flash memories.
Note:
The primary data RAM port is 32 bits wide. Other data ports are
16 bits.
56800E
Program
Flash
Data /
Program
RAM
IPBus
Bridge
Flash
Interface
Unit
CHIP
TAP
Controller
TAP
Linking
Module
4
primary data read port
secondary data read port
Program reads
can be done on
secondary port
of data memory
Program writes
can be done on
primary port of
data memory
NOTE: All Flash reads and writes are routed through
the Flash interface units, which encapsulate the Flash
memories. This is not shown for clarity’s sake.
JTAG / EOnCE
pdb_m[15:0]
pab[20:0]
xdb2_m[15:0]
xab2[23:0]
cdbw[31:0]
pdb_m[23:0]
cdbr_m[31:0]
IPBus
To Flash
Control Logic
External
JTAG Port
GPIO
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