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參數(shù)資料
| 型號(hào)： | DSP56800ERM |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | 16-bit Digital Signal Controllers |
| 中文描述： | 16位數(shù)字信號(hào)控制器 |
| 文件頁數(shù)： | 74/124頁 |
| 文件大?。?/td> | 1880K |
| 代理商： | DSP56800ERM |
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56F8013 Technical Data, Rev. 2
74
Freescale Semiconductor
Preliminary
6.3.9.1
Each bit controls clocks to the indicated peripheral.
I
2
C IPBus Clock Enable (I2C)—Bit 15
0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
6.3.9.2
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
Reserved—Bit 14
6.3.9.3
Each bit controls clocks to the indicated peripheral.
Analog-to-Digital Converter IPBus Clock Enable (ADC)—Bit 13
0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
6.3.9.4
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
Reserved—Bits 12–7
6.3.9.5
Each bit controls clocks to the indicated peripheral.
Timer IPBus Clock Enable (TMR)—Bit 6
0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
6.3.9.6
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
Reserved—Bit 5
6.3.9.7
Each bit controls clocks to the indicated peripheral.
SCI IPBus Clock Enable (SCI)—Bit 4
0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
6.3.9.8
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
Reserved—Bit 3
6.3.9.9
Each bit controls clocks to the indicated peripheral.
SPI IPBus Clock Enable (SPI)—Bit 2
0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
6.3.9.10 Reserved—Bit 1
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
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