參數(shù)資料
型號(hào)： DSP56321VL240
廠商： 飛思卡爾半導(dǎo)體(中國(guó))有限公司
元件分類： 數(shù)字信號(hào)處理
英文描述： 24-Bit Digital Signal Processor
中文描述： 24位數(shù)字信號(hào)處理器
文件頁(yè)數(shù)： 73/84頁(yè)
文件大小： 898K
代理商： DSP56321VL240
DSP56321 Technical Data, Rev. 11
Freescale Semiconductor
A-9
M_IAL0 EQU 0
M_IAL1 EQU 1
M_IAL2 EQU 2
M_IBL EQU $38
M_IBL0 EQU 3
M_IBL1 EQU 4
M_IBL2 EQU 5
M_ICL EQU $1C0
M_ICL0 EQU 6
M_ICL1 EQU 7
M_ICL2 EQU 8
M_IDL EQU $E00
M_IDL0 EQU 9
M_IDL1 EQU 10
M_IDL2 EQU 11
M_D0L EQU $3000
M_D0L0 EQU 12
M_D0L1 EQU 13
M_D1L EQU $C000
M_D1L0 EQU 14
M_D1L1 EQU 15
M_D2L EQU $30000
M_D2L0 EQU 16
M_D2L1 EQU 17
M_D3L EQU $C0000
M_D3L0 EQU 18
M_D3L1 EQU 19
M_D4L EQU $300000
M_D4L0 EQU 20
M_D4L1 EQU 21
M_D5L EQU $C00000
M_D5L0 EQU 22
M_D5L1 EQU 23
; IRQA Mode Interrupt Priority Level (low)
; IRQA Mode Interrupt Priority Level (high)
; IRQA Mode Trigger Mode
; IRQB Mode Mask
; IRQB Mode Interrupt Priority Level (low)
; IRQB Mode Interrupt Priority Level (high)
; IRQB Mode Trigger Mode
; IRQC Mode Mask
; IRQC Mode Interrupt Priority Level (low)
; IRQC Mode Interrupt Priority Level (high)
; IRQC Mode Trigger Mode
; IRQD Mode Mask
; IRQD Mode Interrupt Priority Level (low)
; IRQD Mode Interrupt Priority Level (high)
; IRQD Mode Trigger Mode
; DMA0 Interrupt priority Level Mask
; DMA0 Interrupt Priority Level (low)
; DMA0 Interrupt Priority Level (high)
; DMA1 Interrupt Priority Level Mask
; DMA1 Interrupt Priority Level (low)
; DMA1 Interrupt Priority Level (high)
; DMA2 Interrupt priority Level Mask
; DMA2 Interrupt Priority Level (low)
; DMA2 Interrupt Priority Level (high)
; DMA3 Interrupt Priority Level Mask
; DMA3 Interrupt Priority Level (low)
; DMA3 Interrupt Priority Level (high)
; DMA4 Interrupt priority Level Mask
; DMA4 Interrupt Priority Level (low)
; DMA4 Interrupt Priority Level (high)
; DMA5 Interrupt priority Level Mask
; DMA5 Interrupt Priority Level (low)
; DMA5 Interrupt Priority Level (high)
; Interrupt Priority Register Peripheral (IPRP)
M_HPL EQU $3
M_HPL0 EQU 0
M_HPL1 EQU 1
M_S0L EQU $C
M_S0L0 EQU 2
M_S0L1 EQU 3
M_S1L EQU $30
M_S1L0 EQU 4
M_S1L1 EQU 5
M_SCL EQU $C0
M_SCL0 EQU 6
M_SCL1 EQU 7
M_T0L EQU $300
M_T0L0 EQU 8
M_T0L1 EQU 9
; Host Interrupt Priority Level Mask
; Host Interrupt Priority Level (low)
; Host Interrupt Priority Level (high)
; SSI0 Interrupt Priority Level Mask
; SSI0 Interrupt Priority Level (low)
; SSI0 Interrupt Priority Level (high)
; SSI1 Interrupt Priority Level Mask
; SSI1 Interrupt Priority Level (low)
; SSI1 Interrupt Priority Level (high)
; SCI Interrupt Priority Level Mask
; SCI Interrupt Priority Level (low)
; SCI Interrupt Priority Level (high)
; TIMER Interrupt Priority Level Mask
; TIMER Interrupt Priority Level (low)
; TIMER Interrupt Priority Level (high)
;------------------------------------------------------------------------
;
; EQUATES for TIMER
;
;------------------------------------------------------------------------
; Register Addresses Of TIMER0
M_TCSR0 EQU $FFFF8F
; Timer 0 Control/Status Register
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參數(shù)描述
DSP56321VL275 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC 24 BIT DSP PBFREE RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
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