參數(shù)資料
型號(hào)： DSP56004FJ81
廠商： 飛思卡爾半導(dǎo)體(中國(guó))有限公司
元件分類： 數(shù)字信號(hào)處理
英文描述： SYMPHONY AUDIO DSP FAMILY 24-BIT DIGITAL SIGNAL PROCESSORS
中文描述： Symphony音頻DSP系列的24位數(shù)字信號(hào)處理器
文件頁(yè)數(shù)： 56/82頁(yè)
文件大?。?/td> 636K
代理商： DSP56004FJ81
2-32
DSP56004/D, Rev. 3
For More Information On This Product,
Go to: www.freescale.com
MOTOROLA
Specifications
Serial Host Interface (SHI) I
2
C Protocol Timing
Example:
for C
L
= 50 pF, R
P
= 2 k
, f = 88 MHz, Bypassed Filter mode: The master,
when operating with a DSP56004 SHI I
2
C slave with an 88 MHz operating frequency,
must generate a bus free time greater than 36 ns (T172 slave). Thus, the minimum
permissible t
I
This implies a maximum I
2
C serial frequency of 1010 kHz.
2
CCP
is 56
×
T
C
which gives a bus free time of at least 41 ns (T172 master).
In general, bus performance may be calculated from the C
L
and R
P
of the bus, the
Input Filter modes and operating frequencies of the master and the slave.
Table 2-15
contains the expressions required to calculate all relevant performance timing for a
given C
L
and R
P
.
Table 2-15
SHI Improved I
2
C Protocol Timing
Improved I
2
C (C
L
= 50 pF, R
P
= 2 k
)
No.
Char.
Sym.
Mode
Filter
Mode
Expression
50 MHz
2
66 MHz
3
81 MHz
4
U
n
i
t
Min Max Min Max Min Max
— Tolerable Spike
Width on SCL or
SDA
bypassed
narrow
wide
0
20
100
—
—
—
0
20
100
—
—
—
0
20
100
—
—
—
0
20
100
ns
ns
ns
171 SCL Serial Clock
Cycle
t
SCL
master
slave
bypassed
narrow
wide
bypassed
narrow
wide
t
I
2
CCP
+ 3
×
T
C
+72
+t
r
2
CCP
+ 3
×
T
C
+
245 + t
r
t
I
535 + t
r
4
×
T
C
+ T
H
+
172 + t
r
4
×
T
C
+ T
H
+
366 + t
r
4
×
T
C
+ T
H
+
648 + t
r
0.5
×
t
I
42 – t
r
0.5
×
t
I
42 – t
r
0.5
×
t
I
42 – t
r
2
×
T
C
+ 11
2
×
T
C
+ 35
2
×
T
C
+ 70
12
50
150
t
I
2
CCP
+ 3
×
T
C
+
1050
1263
1593
500
694
976
—
—
—
—
—
—
1007
1225
1591
478
672
954
—
—
—
—
—
—
989
1212
1576
466
660
942
—
—
—
—
—
—
ns
ns
ns
ns
ns
ns
172 Bus Free Time
t
BUF
master
slave
bypassed
narrow
wide
bypassed
narrow
wide
2
CCP
–
2
CCP
–
2
CCP
–
60
80
100
51
75
110
—
—
—
—
—
—
46
68
102
41
65
100
—
—
—
—
—
—
41.1
65.8
103
35.7
59.7
94.7
—
—
—
—
—
—
ns
ns
ns
ns
ns
ns
173 Start Condition
Set-up Time
t
SU;STA
slave
bypassed
narrow
wide
12
50
150
—
—
—
12
50
150
—
—
—
12
50
150
—
—
—
ns
ns
ns
F
Freescale Semiconductor, Inc.
n
.
相關(guān)PDF資料
PDF描述
DSP56004ROM SYMPHONY AUDIO DSP FAMILY 24-BIT DIGITAL SIGNAL PROCESSORS
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DSP56004UM 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DSP56004 24-Bit Digital Signal Processor User＇s Manual Revision 1
DSP56004UM/AD 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:SYMPHONY AUDIO DSP FAMILY 24-BIT DIGITAL SIGNAL PROCESSORS
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