參數(shù)資料
型號(hào): DS87C550-FNL
英文描述: EPROM High-Speed Micro with A/D and PWM
中文描述: 存儲(chǔ)器高速微與A / D及PWM
文件頁(yè)數(shù): 40/50頁(yè)
文件大小: 763K
代理商: DS87C550-FNL
DS87C550
40 of 50
SERIAL PORT MODE 0 TIMING CHARACTERISTICS
PARAMETER
Serial Port Clock Cycle Time
SM2=0, 12 clocks per cycle
SM2=1, 4 clocks per cycle
Output Data Setup to Clock Rising
SM2=0, 12 clocks per cycle
SM2=1, 4 clocks per cycle
Output Data Hold from Clock Rising
SM2=0, 12 clocks per cycle
SM2=1, 4 clocks per cycle
Input Data Hold from Clock Rising
SM2=0, 12 clocks per cycle
SM2=1, 4 clocks per cycle
Clock Rising Edge to Input Data Valid
SM2=0, 12 clocks per cycle
SM2=1, 4 clocks per cycle
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
t
XLXL
12t
CLCL
4t
CLCL
ns
ns
t
QVXH
12t
CLCL
4t
CLCL
ns
ns
t
XHQX
12t
CLCL
4t
CLCL
ns
ns
t
XHDX
12t
CLCL
4t
CLCL
ns
ns
t
XHDV
12t
CLCL
4t
CLCL
ns
ns
EXPLANATION OF AC SYMBOLS
In an effort to remain compatible with the original 8051 family, this device specifies the same parameters
as such devices, using the same symbols. For completeness, the following is an explanation of the
symbols.
t
A
C
D
H
L
I
P
Q
R
V
W
X
Z
Time
Address
Clock
Input data
Logic level high
Logic level low
Instruction
PSEN
Output data
RD
signal
Valid
WR
signal
No longer a valid logic level
Tristate
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