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參數(shù)資料
| 型號(hào)： | DS87C550-FNL |
| 英文描述： | EPROM High-Speed Micro with A/D and PWM |
| 中文描述： | 存儲(chǔ)器高速微與A / D及PWM |
| 文件頁數(shù)： | 15/50頁 |
| 文件大?。?/td> | 763K |
| 代理商： | DS87C550-FNL |
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DS87C550
15 of 50
important to remember that all timers and internal peripherals operate off of some version of the system
clock while the instruction execution engine always operates off of the machine cycle clock.
When CD1 and CD0 (PMR.7-6) are both cleared to a logic 0, the multiplexer selects the frequency
multiplier output. The frequency multiplier can supply a clock that is 2 times or 4 times the frequency of
the incoming signal. If the times-4 multiplier is selected by setting the 4X/
example, the incoming signal is multiplied by 4. This 4X clock is then passed through the multiplexer,
and then output to the CPU State Clock Generation circuits. These CPU State Clock Generation circuits
always
divide the incoming clock by 4 to arrive at the four states (called a machine cycle) necessary for
correct processor operation. In this example, since the clock multiplier multiplies by four and the CPU
State Clock Generation circuit divides by 4, the apparent instruction execution speed is 1 external (or
crystal oscillator) clock per instruction. If the 4X/
2X
bit is set to 0, then the apparent instruction
execution speed is 2 clocks per instruction.
2X
bit (PMR.3) to 1, for
It is important to note that the clock multiplier function does not increase the maximum clock (system
clock) rate of the device. The DS87C550 operates at a maximum system clock rate of 33 MHz. Therefore,
the maximum crystal frequency is 8.25 MHz when a clock multiplier of 4 is used, and is 16.5 MHz when
a clock multiplier of 2 is used. The purpose of the clock multiplier is to simplify crystal selection when
maximum processor operation is desired. Specifically, an 8.25 MHz fundamental mode, AT cut, parallel
resonant crystal is much easier to obtain than the same crystal at 33 MHz. Most crystals in that frequency
range tend to be third overtone type.
As illustrated in Figure 3, the programmable Clock Divide control bits CD1-CD0 (PMR.7-6) provide the
processor with the ability to adapt to different crystal (and external clock) frequencies and also to allow
extreme division of the incoming clock providing lower power operation when desired. The effect of
these bits is shown in Table 5.
CD1:CD0 OPERATION
Table 5
CD1
CD0
0
0
Frequency multiplier (1 or 2 clocks per machine cycle)
0
1
Reserved
1
0
Clock divided by 4 (4 clocks per machine cycle)
Default
1
1
Clock divided by 1024 (1024 clocks per machine cycle)
Instruction Execution
Besides the ability to use a multiplied clock signal, the normal mode of operation, i.e. the reset default
condition (CD1 = 1, CD0 = 0) passes the incoming crystal or external oscillator clock signal straight
through as the system clock. Because of the CPU State Clock generation circuitry’s normal divide-by-4
function, the default execution speed of the DS87C550’s basic instruction is one-fourth the clock
frequency.
The selection of instruction cycle rate takes effect after a delay of one machine cycle. Note that the clock
divider choice applies to all functions including timers. Since baud rates are altered, it may be difficult to
conduct serial communication while in divide-by-1024 mode. This is simplified by the use of switchback
mode (described later) included on the DS87C550.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DS87C550-KCL | EPROM High-Speed Micro with A/D and PWM |
| DS87C550-QNL | EPROM High-Speed Micro with A/D and PWM |
| DS8820J | Line Receiver |
| DS8859AJ | LED Display Driver |
| DS8859AN | LED Display Driver |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS87C550-KCL | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:EPROM High-Speed Micro with A/D and PWM |
| DS87C550-QCL | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:EPROM High-Speed Micro with A/D and PWM |
| DS87C550-QCL+ | 功能描述:IC MCU EPROM ADC/PWM HS 68-PLCC RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:87C 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:260 系列:73S12xx 核心處理器:80515 芯體尺寸:8-位 速度:24MHz 連通性:I²C，智能卡，UART/USART，USB 外圍設(shè)備:LED，POR，WDT 輸入/輸出數(shù):9 程序存儲(chǔ)器容量:64KB（64K x 8） 程序存儲(chǔ)器類型:閃存 EEPROM 大小:- RAM 容量:2K x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:- 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:68-VFQFN 裸露焊盤 包裝:管件 |
| DS87C550-QCW | 制造商:Maxim Integrated Products 功能描述:DS87C550 WAIVERED FOR LS & MARKING - Rail/Tube |
| DS87C550-QNL | 功能描述:IC MCU EPROM ADC/PWM HS 68-PLCC RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:87C 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:260 系列:73S12xx 核心處理器:80515 芯體尺寸:8-位 速度:24MHz 連通性:I²C，智能卡，UART/USART，USB 外圍設(shè)備:LED，POR，WDT 輸入/輸出數(shù):9 程序存儲(chǔ)器容量:64KB（64K x 8） 程序存儲(chǔ)器類型:閃存 EEPROM 大小:- RAM 容量:2K x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:- 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:68-VFQFN 裸露焊盤 包裝:管件 |
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