- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄11785 > DS80C411-FNY+ (Maxim Integrated Products)IC MCU 75MHZ 16MB HP 100-LQFP PDF資料下載
參數(shù)資料
| 型號： | DS80C411-FNY+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 99/102頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU 75MHZ 16MB HP 100-LQFP |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 90 |
| 系列： | 80C |
| 核心處理器： | 8051 |
| 芯體尺寸： | 8-位 |
| 速度： | 75MHz |
| 連通性： | 1 線，CAN，EBI/EMI，以太網(wǎng)，SIO，UART/USART |
| 外圍設備： | 電源故障復位，WDT |
| 輸入/輸出數(shù)： | 64 |
| 程序存儲器容量： | 64KB（64K x 8） |
| 程序存儲器類型： | ROM |
| RAM 容量： | 64K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 1.62 V ~ 3.6 V |
| 振蕩器型： | 外部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 100-LQFP |
| 包裝： | 托盤 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁當前第99頁第100頁第101頁第102頁
DS80C410/DS80C411 Network Microcontrollers with Ethernet and CAN
96 of 102
Table 26. Interrupt Summary
NAME
FUNCTION
VECTOR NATURAL
PRIORITY
FLAG BIT
ENABLE BIT
PRIORITY
CONTROL BIT
PFI
Power-Fail Interrupt
33h
0
PFI (WDCON.4)
EPFI (WDCON.5)
N/A
INT0
External Interrupt 0
03h
1
IE0 (TCON.1)
(Note 2)
EX0 (IE.0)
PX0 (IP.0)
TF0
Timer 0
0Bh
2
TF0 (TCON.5)
(Note 1)
ET0 (IE.1)
PT0 (IP.1)
INT1
External Interrupt 1
13h
3
IE1 (TCON.3)
(Note 2)
EX1 (IE.2)
PX1 (IP.2)
TF1
Timer 1
1Bh
4
TF1 (TCON.7)
(Note 1)
ET1 (IE.3)
PT1 (IP.3)
TI0 or RI0
Serial Port 0
23h
5
RI_0(SCON0.0)
ES0 (IE.4)
PS0 (IP.4)
TI_0(SCON0.1)
TF2
Timer 2
2Bh
6
TF2(T2CON.7)
ET2 (IE.5)
PT2 (IP.5)
TI1 or RI1
Serial Port 1
3Bh
7
RI_1(SCON1.0)
ES1 (IE.6)
PS1 (IP.6)
TI_1(SCON1.1)
INT2
External Interrupts 2–5,
1-Wire Bus Master,
Interrupt
43h
8
IE2 (EXIF.4)
EX2-5 (EIE.0)
PX2-5 (EIP.0)
INT3
IE3 (EXIF.5)
—
INT4
IE4 (EXIF.6)
—
INT5/OWMI
—
IE5 (EXIF.7)
(Note 3)
EOWMI (Note 3)
TF3
Timer 3
4Bh
9
TF3 (T3CM.7))
ET3 (EIE.1)
PT3 (EIP.1)
TI2 or RI2
Serial Port 2
53h
10
IE4 (EXIF.6)
ES2 (EIE.2)
PS2 (EIP.2)
WPI
Write Protect Interrupt
5Bh
11
WPIF (MCON2.7)
EWPI (EIE.3)
PWPI (EIP.3)
C0I
CAN0 Interrupt
6Bh
12
Various
C0IE (EIE.6)
C0IP (EIP.6)
EAI
Ethernet Activity
73h
13
TIF (BCUC.5)
EAIE (EIE.5)
EAIP (EIP.5)
RIF (BCUC.4)
WDTI
Watchdog Timer
63h
14
WDIF (WDCON.3)
EWDI (EIE.4)
PWDI (EIP.4)
EPMI
Ethernet Power Mode
7Bh
15
EPMF (BCUC.6)
EPMIE (EIE.7)
EPMIP (EIP.7)
Unless marked, all flags must be cleared by the application software.
Note 1: Cleared automatically by hardware when the service routine is entered.
Note 2: If edge-triggered, the flag is cleared automatically by hardware when the service routine is entered. If level-triggered, the flag follows the
state of the interrupt pin.
Note 3: The global 1-Wire interrupt-enable bit (EOWMI) and individual 1-Wire interrupt source enables are located in the internal 1-Wire bus
master interrupt enable register, and must be accessed through the OWMAD and OWMDR SFRs. Individual 1-Wire interrupt source
flag bits that are located in the internal 1-Wire bus master Interrupt flag register are accessed in the same way.
One’s Complement Adder
The DS80C410 implements a one’s complement adder to support the Internet checksum algorithm. The adder
contains a 16-bit accumulator and is accessed through the one’s complement adder data (OCAD) SFR.
Writing two bytes to the OCAD register initiates a summation between the 16-bit accumulator and the 16-bit value
entered. When entering a new 16-bit value for summation, the MSB should be loaded first and the LSB loaded
second. The calculation begins on the first machine cycle following the second write to the OCAD register and
executes in a single machine cycle. This allows back-to-back writes of 16-bit data to the OCAD register for
summation. The carry out bit from the high-order bit of the calculation is added back into the low-order bit of the
accumulator.
Reading two bytes from the OCAD register downloads the contents of the 16-bit accumulator. When reading the
16-bit accumulator through the OCAD register, the MSB is unloaded first and the LSB is unloaded second. The 16-
bit accumulator is cleared to 0000h following the second read of the OCAD SFR.
The following is an example sequence for producing an Internet checksum for transmission.
Read OCAD twice to make certain that the 16-bit accumulator = 0000h
Write MSB of 16-bit value to OCAD
Write LSB of 16-bit value to OCAD
相關PDF資料 |
PDF描述 |
|---|---|
| MS27468T17B55PA | CONN RCPT 55POS JAM NUT W/PINS |
| DS87C520-MNL+ | IC MCU EPROM/ROM 33MH IND 40-DIP |
| DS87C530-QCL+ | IC MCU EPR/ROM W/RTC 33MZ 52PLCC |
| DS80C320-MCL+ | IC MCU HI SPEED 33MHZ 40-DIP |
| MS27513E18B35S | CONN RCPT 66POS BOX MNT W/SCKT |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| DS80C411-FNY+ | 功能描述:8位微控制器 -MCU Network MCU w/Ethernet & CAN RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| DS80CH11 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:System Energy Manager |
| DS80CH11+E02 | 制造商:Maxim from Components Direct 功能描述:MAXIM DS80CH11+E02 SYSTEM ENERGY MANAGERS - Trays 制造商:Maxim 功能描述:Maxim DS80CH11+E02 System Energy Managers |
| DS80CH11-E02 | 制造商:Maxim from Components Direct 功能描述:MAXIM DS80CH11-E02 SYSTEM ENERGY MANAGERS - Trays 制造商:Maxim 功能描述:Maxim DS80CH11-E02 System Energy Managers |
| DS80E100 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:5 to 12.5 Gbps, Power-Saver Equalizer for Backplanes and Cables |
發(fā)布緊急采購，3分鐘左右您將得到回復。