參數(shù)資料
型號： DS80C411-FNY+
廠商： Maxim Integrated Products
文件頁數(shù)： 44/102頁
文件大?。?/td> 0K
描述： IC MCU 75MHZ 16MB HP 100-LQFP
產品培訓模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝： 90
系列： 80C
核心處理器： 8051
芯體尺寸： 8-位
速度： 75MHz
連通性： 1 線，CAN，EBI/EMI，以太網(wǎng)，SIO，UART/USART
外圍設備： 電源故障復位，WDT
輸入/輸出數(shù)： 64
程序存儲器容量： 64KB（64K x 8）
程序存儲器類型： ROM
RAM 容量： 64K x 8
電壓 - 電源 (Vcc/Vdd)： 1.62 V ~ 3.6 V
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 100-LQFP
包裝： 托盤
DS80C410/DS80C411 Network Microcontrollers with Ethernet and CAN
46 of 102
Table 6. External Memory Addressing Pin Assignments
ADDRESS
SIGNAL
MULTIPLEXED (MUX = 0)
DEMULTIPLEXED (MUX = 1)
A21
P6.5
A20
P6.4
A19
P4.7
A18
P4.6
A17
P4.5
A16
P4.4
A15–A8
P2.7–P2.0
A7–A0
P0.7–P0.0
P7.7–P7.0
DATA
D7–D0
P0.7–P0.0
CHIP ENABLES
CE7
P6.3
CE6
P6.2
CE5
P6.1
CE4
P6.0
CE3
P4.3
CE2
P4.2
CE1
P4.1
CE0
P4.0
PERIPHERAL CHIP
ENABLES
PCE3
P5.7
PCE2
P5.6
PCE1
P5.5
PCE0
P5.4
Combined Program/Data Memory Access
The DS80C410 can be configured to allow data memory access (MOVX) to the program memory area. This feature
might be useful, for example, when modifying lookup tables or supporting in-application programming of code
space. Setting any of the PDCE7-4 (MCON1.3-0) or PDCE3-0 (MCON.3-0) bits enables combined program/data
memory access and causes the corresponding chip-enable (CE) signal to function for both MOVC and MOVX
operations. When combined program/data memory access is enabled, the peripheral chip-enable (PCE) signals
previously assigned to that data memory space are disabled. Write access to combined program and data memory
blocks is controlled by the WR signal, and read access is controlled by the PSEN signal. This feature is especially
useful if the design achieves in-system reprogrammability through external flash memory, in which a single device
is accessed through both MOVC instructions (program fetch) and MOVX write operations (updates to code
memory). Figure 1 demonstrates how setting PDCE bits can alter external memory data access.
When combined program/data memory access is enabled, there is the potential to inadvertently modify code that a
user meant to leave fixed. For this reason, the DS80C410 provides the ability to write protect the first 0–16kB of
memory accessible through each of the chip enables CE3, CE2, CE1, and CE0. The write-protection feature for
each chip enable is invoked by setting the appropriate WPE3–0 (MCON2.3-0) bit. The protected range is defined
by the WPR2–0 (MCON2.6–4) bit settings as shown in Table 7. Any MOVX instructions attempting to write to a
protected area are disallowed and set the write-protected interrupt flag (WPIF–MCON2.7), causing a write-protect
interrupt if enabled.
Table 7. Write-Protection Range
MCON2.6–4
RANGE PROTECTED (kB)
000
0 to 2
001
0 to 4
010
0 to 6
011
0 to 8
100
0 to 10
101
0 to 12
110
0 to 14
111
0 to 16
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DS80C411-FNY+ 功能描述:8位微控制器 -MCU Network MCU w/Ethernet & CAN RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
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