參數(shù)資料
型號(hào): DS80C400-FNY
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 52/97頁(yè)
文件大小: 0K
描述: IC MCU 75MHZ 16MB HP 100-LQFP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
產(chǎn)品變化通告: Product Discontinuation 20/Feb/2012
標(biāo)準(zhǔn)包裝: 90
系列: 80C
核心處理器: 8051
芯體尺寸: 8-位
速度: 75MHz
連通性: 1 線,CAN,EBI/EMI,以太網(wǎng),SIO,UART/USART
外圍設(shè)備: 電源故障復(fù)位,WDT
輸入/輸出數(shù): 64
程序存儲(chǔ)器容量: 64KB(64K x 8)
程序存儲(chǔ)器類型: ROM
RAM 容量: 1K x 8
電壓 - 電源 (Vcc/Vdd): 1.62 V ~ 3.6 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-LQFP
包裝: 托盤
配用: DS80C400-KIT#-ND - EVAL KIT FOR DS80C400
DS80C400 Network Microcontroller
56 of 97
CSR Register:
MII Address
Register Address:
14h
Bit Names:
31
24
23
16
15
PHYA [4:0]
PHYR [4:2]
8
7
PHYR [1:0]
W/ R
BUSY
0
Reset State:
31
0
24
23
0
16
15
0
8
7
0
PHYA[4:0], PHY Address [4:0]. This 5-bit address specifies the PHY address for 2-wire MII serial-management
bus communication.
PHYR[4:0], PHY Register Select [4:0]. This 5-bit field specifies the PHY register to be accessed in 2-wire MII
serial-management bus communication.
W/R, Write/Read. This bit is used to indicate whether a write or read operation is to be requested of the addressed
PHY/PHY register.
0 = read
1 = write
BUSY, Busy. This status bit indicates when PHY communication is currently taking place on the MII serial-
management bus. The application must wait until BUSY = 0 before modifying the MII address and MII data
registers prior to each read/write operation.
0 = MII serial-management bus idle
1 = MII serial-management bus busy (write/read in progress)
CSR Register:
MII Data
Register Address:
18h
Bit Names:
31
24
23
16
15
PHYD [15:8]
8
7
PHYD [7:0]
0
Reset State:
31
0
24
23
0
16
15
0
8
7
0
PHYD[15:0], PHY Data [15:0]. These 16 bits contain the data read from the PHY register following a read
operation, or the data to be written to the PHY register prior to a write operation.
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