參數(shù)資料
型號: DS3148
廠商: Maxim Integrated Products
文件頁數(shù): 58/89頁
文件大?。?/td> 0K
描述: IC 8CH DS3/3 FRAMER 349-BGA
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1
控制器類型: DS3/E3 調(diào)幀器
接口: LIU
電源電壓: 3.135 V ~ 3.465 V
電流 - 電源: 640mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 349-BGA 裸露焊盤
供應(yīng)商設(shè)備封裝: 349-HCBGA(27x27)
包裝: 托盤
DS3146/DS3146/DS31412 6-/8-/12-Channel DS3/E3 Framers
61 of 89
Register Name:
HIR
Register Description:
HDLC Information Register
Register Address:
57h
Bit #
7
6
5
4
3
2
1
0
Name
N/A
REMPTY
TEMPTY
TFL3
TFL2
TFL1
TFL0
Default
Note: Bits in this information register cannot cause an interrupt to occur.
Bits 0 to 3: Transmit FIFO Level (TFL[3:0]). These real-time status bits indicate the current depth of the transmit
FIFO in 16-byte increments.
TFL3
TFL2
TFL1
TFL0
TRANSMIT FIFO
LEVEL (BYTES)
0
Empty to 15
0
1
16 to 31
0
1
0
32 to 47
0
1
48 to 63
0
1
0
64 to 79
0
1
0
1
80 to 95
0
1
0
96 to 111
0
1
112 to 127
1
0
128 to 143
1
0
1
144 to 159
1
0
1
0
160 to 175
1
0
1
176 to 191
1
0
192 to 207
1
0
1
208 to 223
1
0
224 to 239
1
240 to 256
Bit 4: Transmit FIFO Empty (TEMPTY). This real-time status bit is set when the transmit FIFO is empty and
cleared when the transmit FIFO contains one or more bytes.
Bit 5: Receive FIFO Empty (REMPTY). This real-time status bit is set when the receive FIFO is empty and cleared
when the receive FIFO contains one or more bytes.
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