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參數(shù)資料
| 型號： | DS2722-F-05 |
| 英文描述： | 900MHz Low-IF 1.5Mbps FSK Transceiver Final Datasheet |
| 中文描述： | 900MHz的低IF 1.5Mbps的FSK收發(fā)器最終數(shù)據(jù)表 |
| 文件頁數(shù)： | 6/28頁 |
| 文件大?。?/td> | 463K |
| 代理商： | DS2722-F-05 |
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ML2722
DS2722-F-05
FINAL DATASHEET
DECEMBER 2003
6
TRANSMIT RF BUFFER
P
OUT
Driver amplifier output power
When matched into 50
-4.5
-1.0
+2.0
dBm
Driver amplifier output return
loss
902 to 928 MHz
14
dB
TRANSMIT MODULATION
f
DEV
Modulation Deviation, internal
VCO
5 consecutive 1 or 0 bits
400
460
560
kHz
f
OS
Modulation center frequency
offset
Between 50
μ
s and 10 ms after PAON
high
-100
+100
kHz
TRANSMIT DATA FILTER
BW
TX
Transmit data filter bandwidth
3dB Bandwidth
1.4
MHz
INTERFACE LOGIC LEVELS
V
IH
Input high voltage
never exceed VDD
0.75
*
VDD
VDD
V
V
IL
Input low voltage
0.25
*
VDD
V
I
B
Input bias current
-5
0
5
μ
A
C
IN
Input capacitance
measured at 1MHz
4
6
pF
V
OH
DOUT high voltage
Sourcing 0.1 mA
Typical value assumes 3.3V VDD
VDD
-
0.6
3.08
V
V
OL
DOUT low voltage
Sinking 0.1 mA
0.18
0.6
V
INTERFACE TIMING
t
RX2PA
RX to TX switching time
Time from RXON low to PAON high
62.5
70
μ
s
t
TX2EN
TX to RX switching time
Time from RXON high to receiver
enabled
72
80
μ
s
t
RXEN
Channel switching time
Time from write to PLL tuning register
(EN high) to receiver enabled
320
342
μ
s
t
XCEN
Chip enable time
From XCEN high to receiver enabled
with continuous reference applied
320
342
μ
s
Note 1: Limits are guaranteed by 100% testing, sampling or correlation with worst case test conditions.
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