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參數(shù)資料
| 型號： | DS2482-800 |
| 英文描述： | Eight-Channel 1-Wire Master |
| 中文描述： | 八通道1-Wire主控制器 |
| 文件頁數(shù)： | 12/22頁 |
| 文件大?。?/td> | 261K |
| 代理商： | DS2482-800 |
DS2482-800: Eight-Channel 1-Wire Master
12 of 22
1-Wire Reset
Command Code
Command Parameter
B4h
None
Generates a 1-Wire Reset/Presence Detect cycle (Figure 5) at the
selected IO channel. The state of the 1-Wire line is sampled at t
SI
and t
MSP
and the result is reported to the host processor through the status register,
bits PPD and SD.
To initiate or end any 1-Wire communication sequence.
1-Wire activity must have ended before the DS2482 can process this
command.
Command code will not be acknowledged if 1WB = 1 at the time the
command code is received and the command will be ignored.
t
RSTL
+ t
RSTH
+ maximum 262.5ns, counted from the falling SCL edge of the
command code acknowledge bit.
Begins maximum 262.5ns after the falling SCL edge of the command
code acknowledge bit.
Status Register (for busy polling)
1WB (set to 1 for t
RSTL
+ t
RSTH
),
PPD is updated at t
RSTL
+ t
MSP
,
SD is updated at t
RSTL
+ t
SI
1WS, PPM, APU apply
Description
Typical Use
Restriction
Error Response
Command Duration
1-Wire Activity
Read Pointer Position
Status Bits Affected
Configuration Bits Affected
1-Wire Single Bit
Command Code
Command Parameter
87h
Bit Byte
Generates a single 1-Wire time slot with a bit value ‘V’ as specified by the
bit byte at the selected 1-Wire IO channel. A ‘V’ value of 0b will generate a
write-zero time slot (Figure 6), a value of 1b will generate a write one slot,
which also functions as a read data time slot (Figure 7). In either case the
logic level at the 1-Wire line is tested at t
MSR
and SBR is updated.
To perform single bit writes or reads on a 1-Wire IO channel when single
bit communication is necessary (the exception).
1-Wire activity must have ended before the DS2482 can process this
command.
Command code and bit byte will not be acknowledged if 1WB = 1 at the
time the command code is received and the command will be ignored.
t
SLOT
+ maximum 262.5ns, counted from the falling SCL edge of the first
bit (MS bit) of the bit byte.
Begins maximum 262.5ns after the falling SCL edge of the MS bit of the
bit byte.
Status Register (for busy polling and data reading)
1WB (set to 1 for t
SLOT
)
SBR is updated at t
MSR
DIR (may change its state)
1WS, APU, SPU apply
Description
Typical Use
Restriction
Error Response
Command Duration
1-Wire Activity
Read Pointer Position
Status Bits Affected
Configuration Bits Affected
Bit Allocation in the Bit Byte
bit 7
bit 6
V
x
x = don’t care
bit 5
x
bit 4
x
bit 3
x
bit 2
x
bit 1
x
bit 0
x
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DS2482-100 | Single-Channel 1-Wire Master |
| DS2482S-100 | Single-Channel 1-Wire Master |
| DS2482S-800 | Eight-Channel 1-Wire Master |
| DS2502-E48 | 48-Bit Node Address Chip |
| DS26401 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS2482-800_12 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:8-Channel 1-Wire Master |
| DS2482S-100 | 功能描述:接口 - 專用 RoHS:否 制造商:Texas Instruments 產(chǎn)品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:BGA-59 |
| DS2482S-100/R | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:Single-Channel 1-Wire Master |
| DS2482S-100/T | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:Single-Channel 1-Wire Master |
| DS2482S-100/T&R | 功能描述:接口 - 專用 RoHS:否 制造商:Texas Instruments 產(chǎn)品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:BGA-59 |
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