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參數(shù)資料
| 型號： | DS2450S+T&R |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 4/25頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CONVERTER A/D QUAD 1-W 8-SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 產(chǎn)品變化通告： | Product Discontinuation 27/Jul/12 |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 1k |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 2.5mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.209"，5.30mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOIC |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 4 個單端，單極 |
DS2450
12 of 24
TRANSACTION SEQUENCE
The protocol for accessing the DS2450 via the 1-Wire port is as follows:
Initialization
ROM Function Command
Memory/Convert Function Command
Transaction/Data
INITIALIZATION
All transactions on the 1-Wire bus begin with an initialization sequence. The initialization sequence
consists of a reset pulse transmitted by the bus master followed by presence pulse(s) transmitted by the
slave(s). The presence pulse lets the bus master know that the DS2450 is on the bus and is ready to
operate. For more details, see the “1-Wire Signaling” section.
ROM FUNCTION COMMANDS
Once the bus master has detected a presence, it can issue one of the seven ROM function commands. All
ROM function commands are eight bits long. A list of these commands follows (refer to flowchart in
Figure 9):
Read ROM [33H]
This command allows the bus master to read the DS2450’s 8-bit family code, unique 48-bit serial
number, and 8-bit CRC. This command can only be used if there is a single DS2450 on the bus. If more
than one slave is present on the bus, a data collision will occur when all slaves try to transmit at the same
time (open drain will produce a wired-AND result). The resultant family code and 48-bit serial number
will result in a mismatch of the CRC.
MATCH ROM [55H]
The match ROM command, followed by a 64-bit ROM sequence, allows the bus master to address a
specific DS2450 on a multidrop bus. Only the DS2450 that exactly matches the 64-bit ROM sequence
will respond to the following memory/convert function command. All slaves that do not match the 64-bit
ROM sequence will wait for a reset pulse. This command can be used with a single or multiple devices
on the bus.
SKIP ROM [CCH]
This command can save time in a single drop bus system by allowing the bus master to access the
memory/ convert functions without providing the 64-bit ROM code. If more than one slave is present on
the bus and a read command is issued following the Skip ROM command, data collision will occur on the
bus as multiple slaves transmit simultaneously (open drain pulldowns will produce a wired-AND result).
SEARCH ROM [F0H]
When a system is initially brought up, the bus master might not know the number of devices on the 1-
Wire bus or their 64-bit ROM codes. The Search ROM command allows the bus master to use a process
of elimination to identify the 64-bit ROM codes of all slave devices on the bus. The search ROM process
is the repetition of a simple 3-step routine: read a bit, read the complement of the bit, then write the
desired value of that bit. The bus master performs this simple, 3-step routine on each bit of the ROM.
After one complete pass, the bus master knows the contents of the ROM in one device. The remaining
number of devices and their ROM codes may be identified by additional passes. See Chapter 5 of the
Book of DS19xx iButton Standards for a comprehensive discussion of a Search ROM, including an actual
example.
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