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參數(shù)資料
| 型號(hào)： | DS2450S+T&R |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 17/25頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC CONVERTER A/D QUAD 1-W 8-SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 產(chǎn)品變化通告： | Product Discontinuation 27/Jul/12 |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 1k |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 2.5mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.209"，5.30mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOIC |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 4 個(gè)單端，單極 |
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DS2450
24 of 24
AC ELECTRICAL CHARACTERISTICS
OVERDRIVE SPEED
(-40°C to +85°C)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS NOTES
Time Slot
tSLOT
6
16
μ
s
Write 1 Low Time
tLOW1
1
2
μ
s
Write 0 Low Time
tLOW0
6
16
μ
s
Read Low Time
tLOWR
1
2
μ
s
Read Data Valid
tRDV
Exactly 2
μ
s
Release Time
tRELEASE
0
1.5
4
μ
s
Read Data Setup
tSU
1
μ
s
4
Recovery Time
tREC
1
μ
s
Reset Time High
tRSTH
48
μ
s
Reset Time Low
tRSTL
48
80
μ
s
Presence Detect High
tPDH
2
6
μ
s
Presence Detect Low
tPDL
8
24
μ
s
AC ELECTRICAL CHARACTERISTICS
(-40°C to +85°C)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS NOTES
Sample & Hold Aperture
tSH
20
μ
s
Equivalent Input Noise
VINOISE
t.b.d.
μ
V
RMS
Total Conversion Error
NERR
±
1/2
LSB
9
NOTES:
1. All voltages are referenced to ground.
2. VPUP = external pullup voltage.
3. Input load is to ground.
4. Read data setup time refers to the time the host must pull the 1-Wire bus low to read a bit. Data is
guaranteed to be valid within 1 μs of this falling edge.
5. Capacitance on the data pin could be 800 pF when power is first applied. If a 5 kΩ resistor is used to
pull up the data line to VPUP, 5 μs after power has been applied the parasite capacitance will not affect
normal communications.
6. The reset low time (tRSTL) should be restricted to a maximum of 960 μs, to allow interrupt signaling,
otherwise, it could mask or conceal interrupt pulses.
7. Measured with VCC = 5.0V supply and 1-Wire input open.
8. Measured with VCC = 5.0V supply, 1-Wire input open and analog circuitry inactive.
9. At 8-bit resolution regardless of range and temperature; includes offset, non-linearity and noise. Out
of range is denoted by an all zeros reading. Input voltage at or near minimum and maximum input
range may include additional non-linearity error.
10. VCC or 1-Wire pullup voltage must ramp to 4.5V or higher at least 1s before voltage can be applied
to analog inputs. This can be achieved through low-pass filtering of the analog input voltage.
REVISION HISTORY
Pages changed at Rev 071906: 1, 2, 6, 7, 23, 24
Pages changed at Rev 112706: 1, 7, 23, 24
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