- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376802 > DM9102 (Electronic Theatre Controls, Inc.) Single Chip Fast Ethernet NIC controller PDF資料下載
參數(shù)資料
| 型號： | DM9102 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Single Chip Fast Ethernet NIC controller |
| 中文描述： | 單芯片快速以太網(wǎng)網(wǎng)卡控制器 |
| 文件頁數(shù)： | 52/77頁 |
| 文件大小： | 459K |
| 代理商： | DM9102 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁當(dāng)前第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁
DM9102A
Single Chip Fast Ethernet NIC controller
52
Final
Version: DM9102A-DS-F03
August 28, 2000
Transmit Descriptor Format
31
0
OWN
Status
Control bits
Buffer Address
Next Descriptor Address
TDES0
TDES1
TDES2
TDES3
Buffer Length
TDES0: Owner Bit with Transmit Status
Bit 31: OWN,
1=owned by DM9102A, 0=owned by host, this bit should be
set when the transmitting buffer is filled with data and ready
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
OWN
to be transmitted. It will be reset by DM9102A after
transmitting the whole data buffer.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
ES
EC
0
CC
TX
JT
LOC
NC
LC
0
FUE
DF
This word wide content includes status of transmitted frame.
They are loaded after the data buffer that belongs to the
corresponding descriptor is transmitted.
Bit 15: ES, Error Summary
It is set for the following error conditions:
Transmit Jabber Time-out (TXJT=1), Loss of Carrier
(LOC=1), No Carrier (NC=1), Late Collision (LC=1),
Excessive Collision (EC=1), FIFO Underrun Error (FUE=1).
Bit 14: TXJT, Transmit Jabber Time Out
It is set to indicate the transmitted frame is truncated due to
transmit jabber time out condition. The transmit jabber time
out interrupt CR5<3> is set.
Bit 11: LOC, Loss of Carrier
It is set to indicate the loss of carrier during the frame
transmission. It is not valid in internal loopback mode.
Bit 10: NC, No Carrier
It is set to indicate that no carrier signal from transceiver is
found. It is not valid in internal loopback mode.
Bit 9: LC, Late Collision
It is set to indicate a collision occurs after the collision
window of 64 bytes. Not valid if FUE is set.
Bit 8: EC, Excessive collision
It is set to indicate the transmission is aborted due to 16
excessive collisions.
Bit 7: Reserved
This bit is 0 when read.
Bits 6-3: CC, Collision Count
These bits show the number of collision before
transmission. Not valid if excessive collision bit is also set.
Bit 2: Reserved
This bit is 0 when read.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DM9102A | Single Chip Fast Ethernet NIC controller |
| DM9102AF | Single Chip Fast Ethernet NIC controller |
| DM9102AT | Single Chip Fast Ethernet NIC controller |
| DM9108APPLICATIONENGINEERINGNOTESONE | DM9108 Application Engineering notes one |
| DM9108APPLICATIONENGINEERINGNOTESTHREE | DM9108 Application Engineering notes three |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DM9102A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single Chip Fast Ethernet NIC controller |
| DM9102AF | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single Chip Fast Ethernet NIC controller |
| DM9102AT | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single Chip Fast Ethernet NIC controller |
| DM9102D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SINGLE CHIP FAST ETHEMET NIC CONTROLLER |
| DM9102DE | 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:Single Chip Fast Ethernet NIC Controller |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。