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參數(shù)資料
| 型號： | DM9102 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Single Chip Fast Ethernet NIC controller |
| 中文描述： | 單芯片快速以太網(wǎng)網(wǎng)卡控制器 |
| 文件頁數(shù)： | 12/77頁 |
| 文件大?。?/td> | 459K |
| 代理商： | DM9102 |
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DM9102A
Single Chip Fast Ethernet NIC controller
90
SPEED10#
/ LINK#
12
Final
Version: DM9102A-DS-F03
August 28, 2000
O
LED output pin, active low
mode 0 = 10Mbps LED
mode 1 = Link LED
Network Interface
Pin No.
128QFP/128TQFP
105,106
Pin Name
I/O
Description
RXI+
RX-
I
100M/10Mbps differential input pair.
These two pins are differential receive input pair for
100BASE-TX and 10BASE-T. They are capable of receiving
100BASE-TX MLT-3 or 10BASE-T Manchester encoded
data.
100M/10Mbps differential output pair.
These two pins are differential output pair for 100BASE-TX
and 10BASE-T. This output pair provides controlled rise and
fall times designed to filter the transmitter output.
109,110
TXO+
TXO-
O
Miscellaneous Pins
Pin No.
128QFP/128TQFP
36
Pin Name
I/O
Description
CLOCKRUN#
I/O,
O/D
Clockrun#
The clockrun# signal is used by the system to pause or slow
down the PCI clock signal. It is used by the DM9102A to
enable or disable suspension of the PCI clock signal or restart
of the PCI clock. When the clockrun# signal is not used, this pin
should connected to an external pull-down resistor.
TEST mode control 2
In normal operation, this pin is pulled-high.
TEST mode control 1
In normal operation, this pin is pulled low.
Wake up signal/Card Status Change
This is multiplexed pin to provide Wake on LAN signal or Card
Status Change. In a PCI system, it is used as a WOL signal. In
a CardBus system, it is used as the Card Status Change
output signal and is asynchronous to the clock signal. It
indicates that a power management event has occurred in a
CardBus system. The DM9102A can assert this pin if it detects
link status change, or magic packet, or sample frame. The
default is “normal low, active high pulse”. DM9102A also
support High/Low and Pulse/Level options.
Crystal feedback output pin used for crystal connection only.
Leave this pin open if oscillator is used.
Crystal or Oscillator input. (25MHZ
25MHz Oscillator or series-resonance, fundamental
frequency crystal.
Bandgap Voltage Reference Resistor.
71
TEST2
I
75
TEST1
I
95
WOL/CSTSCHG
O
97
X2
O
98
X1/OSC
I
50ppm)
102
BGRES
I
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DM9102A | Single Chip Fast Ethernet NIC controller |
| DM9102AF | Single Chip Fast Ethernet NIC controller |
| DM9102AT | Single Chip Fast Ethernet NIC controller |
| DM9108APPLICATIONENGINEERINGNOTESONE | DM9108 Application Engineering notes one |
| DM9108APPLICATIONENGINEERINGNOTESTHREE | DM9108 Application Engineering notes three |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DM9102A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single Chip Fast Ethernet NIC controller |
| DM9102AF | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single Chip Fast Ethernet NIC controller |
| DM9102AT | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single Chip Fast Ethernet NIC controller |
| DM9102D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SINGLE CHIP FAST ETHEMET NIC CONTROLLER |
| DM9102DE | 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:Single Chip Fast Ethernet NIC Controller |
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