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| 型號(hào)： | DM9102 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Single Chip Fast Ethernet NIC controller |
| 中文描述： | 單芯片快速以太網(wǎng)網(wǎng)卡控制器 |
| 文件頁(yè)數(shù)： | 34/77頁(yè) |
| 文件大?。?/td> | 459K |
| 代理商： | DM9102 |
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DM9102A
Single Chip Fast Ethernet NIC controller
16
RXPS
0,RO
Receive Missed Counter Overflow
This bit is set when the Receive Missed Frame Counter (RXCI) has an overflow
condition. It is a read only register bit.
15:0
RXCI
0,RO
Receive Missed Frame Counter
This is a statistic counter to indicate the Receive Missed Frame Count when there is
a host buffer unavailable condition for receive process.
34
Final
Version: DM9102A-DS-F03
August 28, 2000
10. PROM & Management Access Register (CR9)
31
30
29
28
27 26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11 10
9
8
7
6
5
4
3
2
1
0
Bit
31:22
21
Name
Undefined
LES
Default
X,RO
0,RO
Description
Undefined
Load EEPROM status
It is set to indicate the load of EEPROM is finished.
Reload EEPROM
It is set to reload the content of EEPROM.
MII Management Data_In
This is read only bit to indicate the MDIO input data.
MII Management Read/Write Mode Selection
This bit defines the Read/Write Mode for MII management interface for PHY
access.
MII Management Data_Out
This bit is used to generate the output data signal for the MDIO pin.
MII Management Clock
This bit is used to generate the output clock signal for the MDC pin.
Must be One.
Memory Read Control
This bit is set to perform the read operation for the Boot PROM or EEPROM
access.
Memory Write Control
This bit is set to perform the write operation for the Boot PROM (Multiplex mode) or
EEPROM access.
Boot ROM Selected
This bit is set to select the Boot ROM access for memory interface.
EEPROM Selected
This bit is set to select the EEPROM access for memory interface.
External Register Selected
This bit is set to select an external register.
Must be One
Data input/output of Boot ROM
This field contains the data which reads from or write to the Boot ROM when the
Boot ROM mode is selected. ( CR9<12> = 1 )
If EEPROM is selected ( CR9<11> = 1 ), then CR9<3:0> are connected the serial
ROM control pins.
20
RLM
0,RW
19
MDIN
0,RO
18
MRW
0,RW
17
MDOUT
0,RW
16
MDCLK
0,RW
15
14
MBO
MRC
1,RO
0,RW
13
EWC
0,RW
12
BRS
1,RW
11
ERS
0,RW
10
XRS
1,RW
9:8
7:0
MBO
DATA
1,RO
1,RW
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DM9102A | Single Chip Fast Ethernet NIC controller |
| DM9102AF | Single Chip Fast Ethernet NIC controller |
| DM9102AT | Single Chip Fast Ethernet NIC controller |
| DM9108APPLICATIONENGINEERINGNOTESONE | DM9108 Application Engineering notes one |
| DM9108APPLICATIONENGINEERINGNOTESTHREE | DM9108 Application Engineering notes three |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DM9102A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single Chip Fast Ethernet NIC controller |
| DM9102AF | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single Chip Fast Ethernet NIC controller |
| DM9102AT | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single Chip Fast Ethernet NIC controller |
| DM9102D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SINGLE CHIP FAST ETHEMET NIC CONTROLLER |
| DM9102DE | 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:Single Chip Fast Ethernet NIC Controller |
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