A-4
DINK32 PowerPC ISA Debugger User’s Manual
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MOTOROLA
Version 12.3 October 25, 2001
17.A final-assy test initialization command was added.
18.More memory optimization commands and data were added.
19.Virtual DINK has a simulator added; all INT instructions supported; most FP and
VEC operations.
20.PCI bus number selection was replaced with a automatically detected bus number.
21.Support for the BigBend platform was removed.
22.md and mm were replaced with the more flexible dd/dm commands (invisibly).
Therefore, the MDMODE option was deleted.
23.Upon startup, memory is always optimized (unless the env is wiped out or a key is
pressed), so MEMOPT is no longer a special ENV variable.
24.For MPC745X processors, L2CACHE is always enabled, so the ENV variable is
less useful (but still supported).
A.3
Version 12.3
October 25, 2001
1. flag assembly of unknown SPRs. as 90000 mfspr r14,badsprname
2. fix the log and dl -h commands, i.e. the host port.
— Restrictions on the dl -h command baud of 19200 or less supported after the
download completes it states the error: ERROR: unrecognized command or
symbol but in fact there is no error so ignore the error message.
3. Accomodate four stack spaces, two each for each of two cpus.
— CPU0:
set user’s stack pointer to 0x20 bytes below the user’s load address of
0x90000-32 (8ffe0) == CPU0U_STACK and 10000 bytes above dink’s stack
space. So if user uses more than 0x8000 stack it will impact the other CPU. set
dink’s stack pointer to 0x80000-32 (7ffe0) == CPU0_STACK
— CPU1: (if present) set user’s stack pointer to 0x20 bytes below the user’s load
address of 0x89000-32 (88fe0) == CPU1U_STACK and 0x10000 bytes above
dink’s stack space So if user uses more than 0x8000 stack it will impact dink
set dink’s stack pointer to 0x79000-32 (78fe0) == CPU1_STACK
NOTE: dink stack space is 0x70000 to 0x80000-32
user space is 0x80000 to 0x90000-32
user can download programs starting at 0x90000
4. Install the code to support MVP and dual vger.
a) galileo bridge chip memory manager
b) galileo bridge chip sdma/uart support
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