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參數(shù)資料
| 型號： | CYV15G0404RB-BGXC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 通信及網(wǎng)絡 |
| 英文描述： | Independent Clock Quad HOTLink II⑩ Deserializing Reclocker |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PBGA256 |
| 封裝： | 27 X 27 MM, 1.57 MM HEIGHT, LEAD FREE, TBGA-256 |
| 文件頁數(shù)： | 22/27頁 |
| 文件大小： | 388K |
| 代理商： | CYV15G0404RB-BGXC |
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CYV15G0404RB
Document #: 38-02102 Rev. *C
Page 22 of 27
CYV15G0404RB Device RESET Characteristics
Over the Operating Range
t
RST
Device RESET Pulse Width
CYV15G0404RB Reclocker Serial Output Characteristics
Over the Operating Range
Parameter
Description
t
B
Bit Time
t
RISE[14]
CML Output Rise Time 20
80% (CML Test Load)
30
ns
Condition
Min.
5128
50
100
180
50
100
180
Max.
660
270
500
1000
270
500
1000
Unit
ps
ps
ps
ps
ps
ps
ps
SPDSELx = HIGH
SPDSELx = MID
SPDSELx =LOW
SPDSELx = HIGH
SPDSELx = MID
SPDSELx =LOW
t
FALL[14]
CML Output Fall Time 80
20% (CML Test Load)
CYV15G0404RB AC Electrical Characteristics
(continued)
Parameter
Description
Min
Max
Unit
PLL Characteristics
Parameter
CYV15G0404RB Reclocker Output PLL Characteristics
t
JRGENSD[14, 22]
Reclocker Jitter Generation - SD Data Rate
t
JRGENHD[14, 22]
Reclocker Jitter Generation - HD Data Rate
CYV15G0404RB Receive PLL Characteristics
Over the Operating Range
t
RXLOCK
Receive PLL Lock to Input Data Stream (cold start)
Receive PLL Lock to Input Data Stream
t
RXUNLOCK
Receive PLL Unlock Rate
Description
Condition
Min
Typ
Max
Unit
TRGCLKx = 27 MHz
TRGCLKx = 148.5 MHz
133
107
ps
ps
376k
376k
46
UI
UI
UI
Note
22.Receiver input stream is BIST data from the transmit channel. This data is reclocked and output to a wide bandwidth digital sampling oscilloscope. The
measurement was recorded after 10,000 histogram hits, time referenced to REFCLKx± of the transmit channel.
Capacitance
[14]
Parameter
C
INTTL
C
INPECL
Description
Test Conditions
Max
7
4
Unit
pF
pF
TTL Input Capacitance
PECL input Capacitance
T
A
= 25°C, f
0
= 1 MHz, V
CC
= 3.3V
T
A
= 25°C, f
0
= 1 MHz, V
CC
= 3.3V
[+] Feedback
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