參數(shù)資料
型號： CYV15G0104
廠商： Cypress Semiconductor Corp.
英文描述： Independent Clock HOTLink II?? Serializer and Reclocking Deserializer
中文描述： 獨立時鐘的HOTLink二？？串行解串器的時鐘重計
文件頁數(shù)： 26/28頁
文件大?。?/td> 985K
代理商： CYV15G0104
PRELIMINARY
CYV15G0104TRB
Document #: 38-02100 Rev. **
Page 26 of 28
C04
C05
C06
M03
M04
M17
M18
M19
M20
N01
N02
N03
N04
N17
N18
N19
N20
P01
P02
P03
P04
P17
P18
P19
P20
R01
R02
R03
R04
R17
R18
R19
R20
T01
T02
T03
T04
T17
T18
T19
T20
U01
U02
VCC
VCC
NC
NC
NC
NC
NC
NC
GND
GND
GND
GND
GND
GND
GND
GND
GND
NC
NC
NC
NC
GND
GND
GND
GND
NC
NC
NC
NC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
TXDB[0]
TXDB[1]
POWER
POWER
NO CONNECT
NO CONNECT
NO CONNECT
NO CONNECT
NO CONNECT
NO CONNECT
GROUND
GROUND
GROUND
GROUND
GROUND
GROUND
GROUND
GROUND
GROUND
NO CONNECT
NO CONNECT
NO CONNECT
NO CONNECT
GROUND
GROUND
GROUND
GROUND
NO CONNECT
NO CONNECT
NO CONNECT
NO CONNECT
POWER
POWER
POWER
POWER
POWER
POWER
POWER
POWER
POWER
POWER
POWER
LVTTL IN
LVTTL IN
F02
F03
F04
U03
U04
U05
U06
U07
U08
U09
U10
U11
U12
U13
U14
U15
U16
U17
U18
U19
U20
V01
V02
V03
V04
V05
V06
V07
V08
V09
V10
V11
V12
V13
V14
V15
V16
V17
V18
V19
V20
W01
W02
NC
VCC
NC
TXDB[2]
TXDB[9]
VCC
NC
NC
GND
GND
ADDR [0]
REFCLKB–
GND
GND
GND
VCC
VCC
RXDA[4]
VCC
BISTSTA
RXDA[0]
TXDB[3]
TXDB[4]
TXDB[8]
NC
VCC
NC
NC
GND
NC
GND
REFCLKB+
RECLKOA
GND
GND
VCC
VCC
RXDA[9]
RXDA[5]
RXDA[2]
RXDA[1]
TXDB[5]
TXDB[7]
NO CONNECT
POWER
NO CONNECT
LVTTL IN
LVTTL IN
POWER
NO CONNECT
NO CONNECT
GROUND
GROUND
LVTTL IN PU
PECL IN
GROUND
GROUND
GROUND
POWER
POWER
LVTTL OUT
POWER
LVTTL OUT
LVTTL OUT
LVTTL IN
LVTTL IN
LVTTL IN
NO CONNECT
POWER
NO CONNECT
NO CONNECT
GROUND
NO CONNECT
GROUND
PECL IN
LVTTL OUT
GROUND
GROUND
POWER
POWER
LVTTL OUT
LVTTL OUT
LVTTL OUT
LVTTL OUT
LVTTL IN
LVTTL IN
L20
M01
M02
W03
W04
W05
W06
W07
W08
W09
W10
W11
W12
W13
W14
W15
W16
W17
W18
W19
W20
Y01
Y02
Y03
Y04
Y05
Y06
Y07
Y08
Y09
Y10
Y11
Y12
Y13
Y14
Y15
Y16
Y17
Y18
Y19
Y20
GND
NC
NC
NC
NC
VCC
NC
NC
GND
ADDR [2]
ADDR [1]
RXCLKA+
REPDOA
GND
GND
VCC
VCC
LFIA
TRGCLKA+
RXDA[6]
RXDA[3]
TXDB[6]
TXCLKB
NC
NC
VCC
NC
NC
GND
TXCLKOB
NC
GND
RXCLKA–
GND
GND
VCC
VCC
TXERRB
TRGCLKA–
RXDA[8]
RXDA[7]
GROUND
NO CONNECT
NO CONNECT
NO CONNECT
NO CONNECT
POWER
NO CONNECT
NO CONNECT
GROUND
LVTTL IN PU
LVTTL IN PU
LVTTL OUT
LVTTL OUT
GROUND
GROUND
POWER
POWER
LVTTL OUT
PECL IN
LVTTL OUT
LVTTL OUT
LVTTL IN
LVTTL IN PD
NO CONNECT
NO CONNECT
POWER
NO CONNECT
NO CONNECT
GROUND
LVTTL OUT
NO CONNECT
GROUND
LVTTL OUT
GROUND
GROUND
POWER
POWER
LVTTL OUT
PECL IN
LVTTL OUT
LVTTL OUT
Table 7. Package Coordinate Signal Allocation
(continued)
Ball
ID
Signal Name
Signal Type
Ball
ID
Signal Name
Signal Type
Ball
ID
Signal Name
Signal Type
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