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參數(shù)資料
| 型號： | CYV15G0104TRB-BGC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Independent Clock HOTLink II?? Serializer and Reclocking Deserializer |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PBGA256 |
| 封裝： | 27 X 27 MM, 1.57 MM HEIGHT, BGA-256 |
| 文件頁數(shù)： | 1/28頁 |
| 文件大小： | 985K |
| 代理商： | CYV15G0104TRB-BGC |
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PRELIMINARY
Independent Clock HOTLink II Serializer and
Reclocking Deserializer
CYV15G0104TRB
Cypress Semiconductor Corporation
Document #: 38-02100 Rev. **
3901 North First Street
San Jose
,
CA 95134
408-943-2600
Revised July 14, 2004
Features
Single channel video serializer plus single channel
video reclocking deserializer
—195- to 1500-Mbps serial data signaling rate
—Simultaneous operation at different signaling rates
Second-generation HOTLink
technology
Compliant to SMPTE 292M and SMPTE 259M video
standards
Supports reception of either 1.485 or 1.485/1.001 Gbps
data rate with the same training clock
Internal phase-locked loops (PLLs) with no external
PLL components
Supports half-rate and full-rate clocking
Selectable differential PECL-compatible serial inputs
—Internal DC-restoration
Redundant differential PECL-compatible serial outputs
—No external bias resistors required
—Internal source termination
—Signaling-rate controlled edge-rates
Synchronous LVTTL parallel interface
JTAG boundary scan
Built-In Self-Test (BIST) for at-speed link testing
Link Quality Indicator
—Analog signal detect
—Digital signal detect
Low-power 1.8W @ 3.3V typical
Single 3.3V supply
Thermally enhanced BGA
0.25
μ
BiCMOS technology
Functional Description
The CYV15G0104TRB Independent Clock HOTLink II
Serializer and Reclocking Deserializer is a point-to-point or
point-to-multipoint communications building block enabling
transfer of data over a variety of high-speed serial links
including SMPTE 292M and SMPTE 259M video applications.
It supports signaling rates in the range of 195 to 1500 Mbps
per serial link. The transmit and receive channels are
independent and can operate simultaneously at different
rates. The transmit channel accepts 10-bit parallel characters
in an Input Register and converts them to serial data. The
receive channel accepts serial data and converts it to 10-bit
parallel characters and presents these characters to an Output
Register. The received serial data can also be reclocked and
retransmitted through the reclocker serial outputs.
Figure 1
illustrates typical connections between independent video co-
processors and corresponding CYV15G0104TRB chips.
The CYV15G0104TRB satisfies the SMPTE 259M and
SMPTE 292M compliance as per SMPTE EG34-1999 Patho-
logical Test Requirements.
As
a
second-generation
CYV15G0104TRB extends the HOTLink family with enhanced
levels of integration and faster data rates, while maintaining
serial-link compatibility (data and BIST) with other HOTLink
devices. The transmit (TX) channel of the CYV15G0104TRB
HOTLink II device accepts scrambled 10-bit transmission
characters. These characters are serialized and output from
dual Positive ECL (PECL) compatible differential trans-
mission-line drivers at a bit-rate of either 10- or 20-times the
input reference clock for that channel.
The receive (RX) channel of the CYV15G0104TRB HOTLink
II device accepts a serial bit-stream from one of two selectable
PECL-compatible differential line receivers, and using a
completely integrated Clock and Data Recovery PLL, recovers
the timing information necessary for data reconstruction. The
recovered bit-stream is reclocked and retransmitted through
the reclocker serial outputs. Also, the recovered serial data is
deserialized and presented to the destination host system.
The transmit and receive channels contain an independent
BIST pattern generator and checker, respectively. This BIST
hardware allows at-speed testing of the high-speed serial data
paths in each transmit and receive section, and across the
interconnecting links.
HOTLink
device,
the
Figure 1. HOTLink II System Connections
V
10
10
V
10
10
Serial
Links
Independent
Channel
CYV15G0104TRB
CYV15G0104TRB
Device
Independent
Channel
Device
Reclocked
Output
Reclocked
Output
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CYV15G0403TB | Independent Clock Quad HOTLink II⑩ Serializer |
| CYV15G0403TB-BGC | Independent Clock Quad HOTLink II⑩ Serializer |
| CYV15G0403TB-BGXC | Independent Clock Quad HOTLink II⑩ Serializer |
| CYV15G0404RB-BGXC | Independent Clock Quad HOTLink II⑩ Deserializing Reclocker |
| CYV15G0404RB | Independent Clock Quad HOTLink II Reclocking Deserializer(獨立時鐘，四路HOTLink II時鐘恢復(fù)串并轉(zhuǎn)換器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CYV15G0104TRB-BGXC | 功能描述:視頻 IC 1x Indep Reclocker Serializer COM RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| CYV15G0201DXB | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Dual-channel HOTLink II⑩ Transceiver |
| CYV15G0201DXB-BBC | 功能描述:電信線路管理 IC Dual Ch Video COM RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| CYV15G0201DXB-BBI | 制造商:Cypress Semiconductor 功能描述: |
| CYV15G0201DXB-BBXC | 功能描述:電信線路管理 IC Dual Ch Video COM RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
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