參數(shù)資料
型號(hào)： CYV15G0104TRB-BGC
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類： 通信及網(wǎng)絡(luò)
英文描述： Independent Clock HOTLink II?? Serializer and Reclocking Deserializer
中文描述： SPECIALTY TELECOM CIRCUIT, PBGA256
封裝： 27 X 27 MM, 1.57 MM HEIGHT, BGA-256
文件頁(yè)數(shù)： 20/28頁(yè)
文件大?。?/td> 985K
代理商： CYV15G0104TRB-BGC
PRELIMINARY
CYV15G0104TRB
Document #: 38-02100 Rev. **
Page 20 of 28
t
TXCLKR [16, 17, 18,
19]
TXCLKB Rise Time
0.2
1.7
ns
t
TXCLKF [16, 17, 18,
19]
TXCLKB Fall Time
0.2
1.7
ns
t
TXDS
t
TXDH
f
TOS
t
TXCLKO
t
TXCLKOD
CYV15G0104TRB Receiver LVTTL Switching Characteristics
Over the Operating Range
f
RS
RXCLKA± Clock Output Frequency
t
RXCLKP
RXCLKA± Period = 1/f
RS
t
RXCLKD
RXCLKA± Duty Cycle Centered at 50% (Full Rate and Half Rate)
t
RXCLKR [16]
RXCLKA± Rise Time
t
RXCLKF [16]
RXCLKA± Fall Time
t
RXDv–[20]
Status and Data Valid Time to RXCLKA± (RXRATEA = 0) (Full Rate)
Status and Data Valid Time to RXCLKA± (RXRATEA = 1) (Half Rate)
t
RXDv+[20]
Status and Data Valid Time to RXCLKA± (RXRATEA = 0)
Status and Data Valid Time to RXCLKA± (RXRATEA = 1)
f
ROS
RECLKOA Clock Frequency
t
RECLKO
RECLKOA Period=1/f
ROS
t
RECLKOD
RECLKOA Duty Cycle centered at 60% HIGH time
CYV15G0104TRB REFCLKB Switching Characteristics
Over the Operating Range
f
REF
REFCLKB Clock Frequency
t
REFCLK
REFCLKB Period = 1/f
REF
t
REFH
REFCLKB HIGH Time (TXRATEB = 1)(Half Rate)
REFCLKB HIGH Time (TXRATEB = 0)(Full Rate)
t
REFL
REFCLKB LOW Time (TXRATEB = 1)(Half Rate)
REFCLKB LOW Time (TXRATEB = 0)(Full Rate)
t
REFD[22]
REFCLKB Duty Cycle
t
REFR [16, 17, 18, 19]
REFCLKB Rise Time (20%–80%)
t
REFF[16, 17, 18, 19]
REFCLKB Fall Time (20%–80%)
t
TREFDS
Transmit Data Set-up Time to
REFCLKB - Full Rate (TXRATEB = 0,
TXCKSELB
=
1)
Transmit Data Set-up Time to
REFCLKB - Half Rate (TXRATEB = 1,
TXCKSELB
=
1)
t
TREFDH
Transmit Data Hold Time from REFCLKB - Full Rate (TXRATEB= 0,
TXCKSELB
=
1)
Transmit Data Hold Time from REFCLKB - Half Rate (TXRATEB = 1,
TXCKSELB
=
1)
Transmit Data Set-up Time to
TXCLKB
↑
(TXCKSELB
=
0)
Transmit Data Hold Time from TXCLKB
↑
(TXCKSELB
=
0)
TXCLKOB Clock Frequency = 1x or 2x REFCLKB Frequency
TXCLKOB Period=1/f
TOS
TXCLKOB Duty Cycle centered at 60% HIGH time
2.2
0.8
19.5
6.66
-1.9
ns
ns
MHz
ns
ns
150
51.28
0
9.75
6.66
–1.0
0.3
0.3
150
102.56
+1.0
1.2
1.2
MHz
ns
ns
ns
ns
ns
ns
ns
ns
MHz
ns
ns
5UI–1.8
[21]
5UI–1.3
[21]
5UI–1.7
[21]
5UI–2.1
[21]
19.5
6.66
-1.9
150
51.28
0
19.5
6.6
5.9
2.9
[16]
5.9
2.9
[16]
30
150
51.28
MHz
ns
ns
ns
ns
ns
%
ns
ns
ns
70
2
2
2.2
1.9
ns
0.8
ns
1.5
ns
Notes:
17. The ratio of rise time to falling time must not vary by greater than 2:1.
18. For a given operating frequency, neither rise or fall specification can be greater than 20% of the clock-cycle period or the data sheet maximum time.
19. All transmit AC timing parameters measured with 1ns typical rise time and fall time.
20. Parallel data output specifications are only valid if all outputs are loaded with similar DC and AC loads.
21. Receiver UI (Unit Interval) is calculated as 1/(f
*20) (when TRGRATEA = 1) or 1/(f
TRG
* 10) (when TRGRATEA = 0). In an operating link this is equivalent to t
B
.
22. The duty cycle specification is a simultaneous condition with the t
REFH
and t
REFL
cycle cannot be as large as 30%–70%.
CYV15G0104TRB AC Electrical Characteristics
(continued)
Parameter
Description
Min.
Max
Unit
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CYV15G0104TRB-BGXC 功能描述:視頻 IC 1x Indep Reclocker Serializer COM RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
CYV15G0201DXB 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Dual-channel HOTLink II⑩ Transceiver
CYV15G0201DXB-BBC 功能描述:電信線路管理 IC Dual Ch Video COM RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray
CYV15G0201DXB-BBI 制造商:Cypress Semiconductor 功能描述:
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