- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄369679 > CYNSE70128 Network Processing PDF資料下載
參數(shù)資料
| 型號(hào)： | CYNSE70128 |
| 英文描述： | Network Processing |
| 中文描述： | 網(wǎng)絡(luò)處理 |
| 文件頁(yè)數(shù)： | 13/126頁(yè) |
| 文件大?。?/td> | 3302K |
| 代理商： | CYNSE70128 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)當(dāng)前第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)
CYNSE70032
Document #: 38-02042 Rev. *E
Page 13 of 126
6.0
Clocks
The CYNSE70032 device receives the CLK2X and PHS_L signals. It uses the PHS_L signal to divide CLK2X and generate an
internal clock (CLK
[3]
), as shown in
Figure 6-1
. The CYNSE70032 device uses CLK2X and CLK for internal operations.
7.0
Registers
All registers in the CYNSE70032 are 68 bits wide. The CYNSE70032 device contains sixteen pairs of comparand storage
registers, eight pairs of GMRs, eight search successful index registers and one each of command, information, burst Read, burst
Write, and next-free address registers.
Table 7-1
provides an overview of all the CYNSE70032 registers. The registers are listed
in ascending address order. Each register group is then described in the subsections that follow.
7.1
The device contains 32 68-bit comparand registers (sixteen pairs) dynamically selected in every Search operation to store the
comparand presented on the DQ bus. The Learn command will later use these registers when it is executed. The CYNSE70032
device stores the Search command’s cycle A comparand in the even-numbered register and its cycle B comparand in the
odd-numbered register, as shown in
Figure 7-1
.
68
index
0
1
Comparand Registers
Notes:
3.
4.
Any reference to “CLK” cycles means one cycle of CLK.
.“CLK” is an internal clock signal.
Table 7-1. Register Overview
Address
0–31
Abbreviation
COMP0–31
Type
R
Name
Sixteen pairs of comparand registers that store comparands from the DQ bus
for learning later.
Eight GMR pairs.
Eight search successful index registers.
Command register.
Information register.
Burst Read register.
Burst Write register.
Next-free address register.
Reserved.
32–47
48–55
56
57
58
59
60
61–63
MASKS
SSR0–7
COMMAND
INFO
RBURREG
WBURREG
NFA
–
RW
R
RW
R
RW
RW
R
–
CLK2X
PHS_L
Figure 6-1. CYNSE70032 Clocks (CLK2X and PHS_L)
CLK
[4]
135
0
68
1
3
5
7
0
2
4
6
30
31
15
Address
Figure 7-1. Comparand Register Selection during Search and Learn Instructions
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CYNSE70256 | Network Processing |
| CZET101 | Clock Driver |
| CZEU101 | Quad Peripheral Driver |
| CZEZ101 | Triple Peripheral Driver |
| CZSP103 | Voltage Reference |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CYNSE70128-83BGC | 制造商:Cypress Semiconductor 功能描述:NETWORK SEARCH ENGINE 388BGA - Trays |
| CYNSE70128-83BGI | 制造商:Cypress Semiconductor 功能描述:NETWORK SEARCH ENGINE 388BGA - Trays |
| CYNSE70129HV-200BGC | 制造商:Cypress Semiconductor 功能描述: |
| CYNSE70131-250BBC | 制造商:Cypress Semiconductor 功能描述: |
| CYNSE70131A-250BBC | 制造商:Cypress Semiconductor 功能描述: |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。