參數(shù)資料
型號(hào)： CYD18S72V
廠商： Cypress Semiconductor Corp.
英文描述： FLEx72 3.3V 64K/128K/256K x 72 Synchronous Dual-Port RAM(FLEx72 3.3V 64K/128K/256K x 72同步雙端口RAM)
中文描述： FLEx72 3.3 64K/128K/256K × 72同步雙口RAM（FLEx72 3.3 64K/128K/256K × 72同步雙端口RAM）的
文件頁(yè)數(shù)： 16/25頁(yè)
文件大?。?/td> 677K
代理商： CYD18S72V
Document #: 38-06069 Rev. *I
Page 16 of 25
CYD04S72V
CYD09S72V
CYD18S72V
Bank Select Read
[33, 34]
Read-to-Write-to-Read (OE = LOW)
[32, 35, 36, 37, 38]
Notes:
33.In this depth-expansion example, B1 represents Bank #1 and B2 is Bank #2; each bank consists of one Cypress FLEx72 device from this data sheet. ADDRESS
(B1)
= ADDRESS
(B2)
.
34. ADS = CNTEN = BE0 – BE7 = OE = LOW; MRST = CNTRST = CNT/MSK = HIGH.
35.Output state (HIGH, LOW, or high-impedance) is determined by the previous cycle control signals.
36.During “No Operation,” data in memory at the selected address may be corrupted and should be rewritten to ensure data integrity.
37. CE
0
= OE = BE0 – BE7 = LOW; CE
1
= R/W = CNTRST = MRST = HIGH.
38.CE
= BE0 – BE7 = R/W = LOW; CE
= CNTRST = MRST = CNT/MSK = HIGH. When R/W first switches low, since OE = LOW, the Write operation cannot be
completed (labelled as no operation). One clock cycle is required to three-state the I/O for the Write operation on the next rising edge of CLK.
Switching Waveforms
(continued)
Q
3
Q
1
Q
0
Q
2
A
0
A
1
A
2
A
3
A
4
A
5
Q
4
A
0
A
1
A
2
A
3
A
4
A
5
t
SA
t
HA
t
SC
t
HC
t
SA
t
HA
t
SC
t
HC
t
SC
t
HC
t
SC
t
HC
t
CKHZ
t
DC
t
DC
t
CD2
t
CKLZ
t
CD2
t
CD2
t
CKHZ
t
CKLZ
t
CD2
t
CKHZ
t
CKLZ
t
CD2
t
CH2
t
CL2
t
CYC2
CLK
ADDRESS
(B1)
CE
(B1)
DATA
OUT(B2)
DATA
OUT(B1)
ADDRESS
(B2)
CE
(B2)
CLK
CE
R/W
ADDRESS
DATA
IN
DATA
OUT
t
HC
t
SC
t
HW
t
SW
t
HA
t
SA
t
HW
t
SW
t
CD2
t
CKHZ
t
SD
t
HD
NO OPERATION
WRITE
READ
A
n
A
n+1
A
n+2
A
n+2
D
n+2
A
n+2
A
n+3
Q
n
t
CL2
t
CH2
t
CYC2
t
DC
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CYD18S72V-100BBC 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 18M (256Kx72) 3.3v 100MHz Synch 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
CYD18S72V-100BBI 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 18M (256Kx72) 3.3v 100MHz Synch 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
CYD18S72V-100BBXC 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:FLEx72⑩ 3.3V 64K/128K/256K x 72 Synchronous Dual-Port RAM
CYD18S72V-100BBXI 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:FLEx72⑩ 3.3V 64K/128K/256K x 72 Synchronous Dual-Port RAM
CYD18S72V-133BBC 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 18M Sync Dual Port 256K x 72 3.3V COM RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
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