參數(shù)資料
型號(hào)： CYD18S72V
廠商： Cypress Semiconductor Corp.
英文描述： FLEx72 3.3V 64K/128K/256K x 72 Synchronous Dual-Port RAM(FLEx72 3.3V 64K/128K/256K x 72同步雙端口RAM)
中文描述： FLEx72 3.3 64K/128K/256K × 72同步雙口RAM（FLEx72 3.3 64K/128K/256K × 72同步雙端口RAM）的
文件頁(yè)數(shù)： 10/25頁(yè)
文件大?。?/td> 677K
代理商： CYD18S72V
Document #: 38-06069 Rev. *I
Page 10 of 25
CYD04S72V
CYD09S72V
CYD18S72V
Table 4. Identification Register Definitions
Instruction Field
Value
0h
C002h
Description
Revision Number(31:28)
Cypress Device(27:12)
Reserved for version number
Defines Cypress DIE number for CYD18S72V and
CYD09S72V
Defines Cypress DIE number for CYD04S72V
Allows unique identification of FLEx72 family device vendor
Indicates the presence of an ID register
C001h
034h
1
Cypress JDEC ID(11:1)
ID Register Presence (0)
Table 5. Scan Registers Sizes
Register Name
Instruction
Bypass
Identification
Boundary Scan
Bit Size
4
1
32
n
[21]
Table 6. Instruction Identification Codes
Instruction
EXTEST
BYPASS
IDCODE
HIGHZ
CLAMP
SAMPLE/PRELOAD
NBSRST
RESERVED
Code
Description
0000
1111
1011
0111
0100
1000
1100
All other codes
Captures the Input/Output ring contents. Places the BSR between the TDI and TDO
Places the BYR between TDI and TDO
Loads the IDR with the vendor ID code and places the register between TDI and TDO
Places BYR between TDI and TDO. Forces all FLEx72 output drivers to a High-Z state
Controls boundary to 1/0. Places BYR between TDI and TDO
Captures the input/output ring contents. Places BSR between TDI and TDO
Resets the non-boundary scan logic. Places BYR between TDI and TDO
Other combinations are reserved. Do not use other than the above
Note:
21.See details in the device BSDL files.
TDO
D2
TDI
TDO
D1
TDI
TDO
D4
TDI
TDO
D3
TDI
TDO
TDI
TDO
D2
TDI
TDO
D1
TDI
TDI
TDO
Figure 3. Scan Chain
18 Mbit
4 Mbit/9 Mbit
相關(guān)PDF資料
PDF描述
CYD09S72V FLEx72 3.3V 64K/128K/256K x 72 Synchronous Dual-Port RAM(FLEx72 3.3V 64K/128K/256K x 72同步雙端口RAM)
CYDC128B08-55AXC 1.8V 4k/8k/16k x 16 and 8k/16k x 8 ConsuMoBL Dual-Port Static RAM
CYDC064B08 1.8V 4k/8k/16k x 16 and 8k/16k x 8 ConsuMoBL Dual-Port Static RAM
CYDC064B08-40AXC 1.8V 4k/8k/16k x 16 and 8k/16k x 8 ConsuMoBL Dual-Port Static RAM
CYDC064B08-55AXC 1.8V 4k/8k/16k x 16 and 8k/16k x 8 ConsuMoBL Dual-Port Static RAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CYD18S72V-100BBC 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 18M (256Kx72) 3.3v 100MHz Synch 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
CYD18S72V-100BBI 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 18M (256Kx72) 3.3v 100MHz Synch 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
CYD18S72V-100BBXC 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:FLEx72⑩ 3.3V 64K/128K/256K x 72 Synchronous Dual-Port RAM
CYD18S72V-100BBXI 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:FLEx72⑩ 3.3V 64K/128K/256K x 72 Synchronous Dual-Port RAM
CYD18S72V-133BBC 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 18M Sync Dual Port 256K x 72 3.3V COM RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*