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參數(shù)資料
| 型號(hào)： | CY7C63743C |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | enCoRe USB Combination Low-Speed USB and PS/2 Peripheral Controller(enCoRe USB結(jié)合低速USB和PS/2外設(shè)控制器) |
| 中文描述： | 的enCoRe USB的組合低速USB和PS / 2外設(shè)控制器（的enCoRe的USB結(jié)合低速的USB和的PS / 2外設(shè)控制器） |
| 文件頁(yè)數(shù)： | 40/49頁(yè) |
| 文件大?。?/td> | 1942K |
| 代理商： | CY7C63743C |
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CY7C63722C
CY7C63723C
CY7C63743C
FOR
FOR
Document #: 38-08022 Rev. *C
Page 40 of 49
26.0
Switching Characteristics
Parameter
Description
Internal Clock Mode
Internal Clock Frequency
Internal Clock Frequency, USB
mode
Conditions
Min.
Max.
Unit
F
ICLK
F
ICLK2
Internal Clock Mode enabled
Internal Clock Mode enabled, Bit 2 of register
0xF8h is set (Precision USB Clocking)
[12]
5.7
5.91
6.3
6.09
MHz
MHz
External Oscillator Mode
Input Clock Cycle Time
T
CYC
USB Operation, with External ±1.5%
Ceramic Resonator or Crystal
164.2
169.2
ns
T
CH
T
CL
Clock HIGH Time
Clock LOW Time
0.45 t
CYC
0.45 t
CYC
ns
ns
Reset Timing
t
START
t
WAKE
t
WATCH
Time-out Delay after LVR/BOR
Internal Wake-up Period
WatchDog Timer Period
24
1
10.1
60
5
14.6
ms
ms
ms
Enabled Wake-up Interrupt
[13]
F
OSC
= 6 MHz
USB Driver Characteristics
Transition Rise Time
Transition Rise Time
Transition Fall Time
Transition Fall Time
Rise/Fall Time Matching
Output Signal Crossover
Voltage
[18]
T
R
T
R
T
F
T
F
T
RFM
V
CRS
CLoad = 200 pF (10% to 90%
[4]
)
CLoad = 600 pF (10% to 90%
[4]
)
CLoad = 200 pF (10% to 90%
[4]
)
CLoad = 600 pF (10% to 90%
[4]
)
t
r
/t
f[4, 14]
CLoad = 200 to 600 pF
[4]
75
ns
ns
ns
ns
%
V
300
75
300
125
2.0
80
1.3
USB Data Timing
Low Speed Data Rate
Receiver Data Jitter Tolerance
Receiver Data Jitter Tolerance
Differential to EOP transition Skew Note 15
EOP Width at Receiver
Source EOP Width
Differential Driver Jitter
Differential Driver Jitter
Width of SE0 during Diff. Transition
T
DRATE
T
DJR1
T
DJR2
T
DEOP
T
EOPR2
T
EOPT
T
UDJ1
T
UDJ2
T
LST
Ave. Bit Rate (1.5 Mb/s ±1.5%)
To Next Transition
[15]
For Paired Transitions
[15]
1.4775
–75
–45
–40
670
1.25
–95
–150
1.5225
75
45
100
Mb/s
ns
ns
ns
ns
μ
s
ns
ns
ns
Accepts as EOP
[15]
1.50
95
150
210
To next transition,
Figure 26-5
To paired transition,
Figure 26-5
Non-USB Mode Driver
Characteristics
SDATA/SCK Transition Fall Time
Note 16
T
FPS2
CLoad = 150 pF to 600 pF
50
300
ns
SPI Timing
See
Figures 26-6 to 26-9
[17]
F
CLK
/3; see
Figure 17-1
T
SMCK
T
SSCK
Notes:
12. Initially F
= F
until a USB packet is received.
13. Wake-up time for Wake-up Adjust Bits cleared to 000b (minimum setting)
14. Tested at 200 pF.
15. Measured at cross-over point of differential data signals.
16. Non-USB Mode refers to driving the D–/SDATA and/or D+/SCLK pins with the Control Bits of the USB Status and Control Register, with Control Bit 2 HIGH.
17. SPI timing specified for capacitive load of 50 pF, with GPIO output mode = 01 (medium low drive, strong high drive).
18. Per the USB 2.0 Specification, Table 7.7, Note 10, the first transition from the Idle state is excluded.
SPI Master Clock Rate
SPI Slave Clock Rate
2
MHz
MHz
2.2
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| CY7C63743C-SXC | 功能描述:輸入/輸出控制器接口集成電路 USB Combo Lo Spd PS/2 Periphrl Cntrlr RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
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| CY7C63743-PC | 功能描述:IC MCU 8K LS USB/PS-2 24-DIP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器 - 特定應(yīng)用 系列:enCoRe™ 產(chǎn)品變化通告:Product Discontinuation 26/Aug/2009 標(biāo)準(zhǔn)包裝:250 系列:- 應(yīng)用:網(wǎng)絡(luò)處理器 核心處理器:4Kc 程序存儲(chǔ)器類型:- 控制器系列:- RAM 容量:16K x 8 接口:以太網(wǎng)，UART，USB 輸入/輸出數(shù):- 電源電壓:1.8V, 3.3V 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:208-LQFP 包裝:帶卷 (TR) 供應(yīng)商設(shè)備封裝:PG-LQFP-208 其它名稱:SP000314382 |
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