參數(shù)資料
型號(hào): CY7C60223
廠商: Cypress Semiconductor Corp.
英文描述: Wireless enCoRe II Microcontroller(無(wú)線enCoRe II微控制器)
中文描述: 的Wireless enCoRe II微控制器(無(wú)線enCoRe II還微控制器)
文件頁(yè)數(shù): 9/62頁(yè)
文件大?。?/td> 1276K
代理商: CY7C60223
CY7C601xx
CY7C602xx
Document 38-16016 Rev. *C
Page 9 of 62
Index Register
Stack Pointer Register
CPU Program Counter High Register
CPU Program Counter Low Register
Addressing Modes
Source Immediate
The result of an instruction using this addressing mode is
placed in the A register, the F register, the SP register, or the
X register, which is specified as part of the instruction opcode.
Operand 1 is an immediate value that serves as a source for
the instruction. Arithmetic instructions require two sources; the
second source is the A, X, SP, or F register specified in the
opcode. Instructions using this addressing mode are two bytes
in length.
Table 5. CPU X Register (CPU_X)
Bit #
7
6
5
4
3
2
1
0
Field
X [7:0]
Read/Write
Default
0
0
0
0
0
0
0
0
Bit [7:0]:
X [7:0]
8-bit data value holds an index for any instruction that uses an indexed addressing mode.
Table 6. CPU Stack Pointer Register (CPU_SP)
Bit #
7
6
5
4
3
2
1
0
Field
Stack Pointer [7:0]
Read/Write
Default
0
0
0
0
0
0
0
0
Bit [7:0]:
Stack Pointer [7:0]
8-bit data value holds a pointer to the current top-of-stack.
Table 7. CPU Program Counter High Register (CPU_PCH)
Bit #
7
6
5
4
3
2
1
0
Field
Program Counter [15:8]
Read/Write
Default
0
0
0
0
0
0
0
0
Bit [7:0]:
Program Counter [15:8]
8-bit data value holds the higher byte of the program counter.
Table 8. CPU Program Counter Low Register (CPU_PCL)
Bit #
7
6
5
4
3
2
1
0
Field
Program Counter [7:0]
Read/Write
Default
0
0
0
0
0
0
0
0
Bit [7:0]:
Program Counter [7:0]
8-bit data value holds the lower byte of the program counter.
Table 9. Source Immediate
Opcode
Operand 1
Instruction
Immediate Value
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