參數(shù)資料
型號(hào)： CY7C60223
廠商： Cypress Semiconductor Corp.
英文描述： Wireless enCoRe II Microcontroller(無線enCoRe II微控制器)
中文描述： 的Wireless enCoRe II微控制器（無線enCoRe II還微控制器）
文件頁數(shù)： 35/62頁
文件大?。?/td> 1276K
代理商： CY7C60223
CY7C601xx
CY7C602xx
Document 38-16016 Rev. *C
Page 35 of 62
P0.0/CLKIN Configuration
P0.1/CLKOUT Configuration
Table 49.P0.0/CLKIN Configuration (P00CR) [0x05] [R/W]
Bit #
7
6
5
4
3
2
1
0
Field
Reserved
Int Enable
Int Act Low
TTL Thresh
High Sink
Open Drain
Pull-up Enable
Output Enable
Read/Write
–
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default
0
0
0
0
0
0
0
0
This pin is shared between the P0.0 GPIO use and the CLKIN pin for the external crystal oscillator. When the external oscillator
is enabled the settings of this register are ignored.
The alternate function of the pin as the CLKIN is only available in the CY7C601xx. When the external oscillator is enabled (the
XOSC Enable bit of the CLKIOCR Register is set—
Table 34
), the GPIO function of the pin is disabled.
The 50-mA sink drive capability is only available in the CY7C601xx. In the CY7C602xx, only 8-mA sink drive capability is available
on this pin regardless of the setting of the High Sink bit.
If this pin is used as a General Purpose output it will draw current. This pin should be configured as an input to reduce current draw.
Table 50.P0.1/CLKOUT Configuration (P01CR) [0x06] R/W]
Bit #
7
6
5
4
3
2
1
0
Field
CLK Output
Int Enable
Int Act Low
TTL Thresh
High Sink
Open Drain
Pull-up Enable
Output Enable
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default
0
0
0
0
0
0
0
0
This pin is shared between the P0.1 GPIO use and the CLKOUT pin for the external crystal oscillator. When the external oscillator
is enabled the settings of this register are ignored. When CLK output is set, the internally selected clock is sent out onto
P0.1CLKOUT pin.
The alternate function of the pin as the CLKOUT is only available in the CY7C601xx. When the external oscillator is enabled
(the XOSC Enable bit of the CLKIOCR Register is set—
Table 34
), the GPIO function of the pin is disabled.
The 50-mA sink drive capability is only available in the CY7C601xx. In the CY7C602xx, only 8-mA sink drive capability is available
on this pin regardless of the setting of the High Sink bit.
If this pin is used as a General Purpose output it will draw current. This pin should be configured as an input to reduce current draw
Bit 7:
CLK Output
0 = The clock output is disabled
1 = The clock selected by the CLK Select field (Bit [1:0] of the CLKIOCR Register—
Table 34
) is driven out to the pin
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY7C60223-3X14C 制造商:Cypress Semiconductor 功能描述:CY7C60223-3X14C - Bulk 制造商:Cypress Semiconductor 功能描述:USB
CY7C60223-3XWC 制造商:Cypress Semiconductor 功能描述:USB - Bulk 制造商:Cypress Semiconductor 功能描述:Bulk / RF Companion Microcontrollers
CY7C60223-PXC 功能描述:IC MCU 8K WIRELESS 24-DIP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:enCoRe™ II CY7C602xx 標(biāo)準(zhǔn)包裝:60 系列:PSOC® 3 CY8C38xx 核心處理器:8051 芯體尺寸:8-位 速度:67MHz 連通性:EBI/EMI，I²C，LIN，SPI，UART/USART 外圍設(shè)備:電容感應(yīng)，DMA，LCD，POR，PWM，WDT 輸入/輸出數(shù):25 程序存儲(chǔ)器容量:64KB（64K x 8） 程序存儲(chǔ)器類型:閃存 EEPROM 大小:2K x 8 RAM 容量:8K x 8 電壓 - 電源 (Vcc/Vdd):1.71 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 2x20b，D/A 4x8b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:48-VFQFN 裸露焊盤 包裝:托盤
CY7C60223-QXC 功能描述:8位微控制器 -MCU Wireless enCoRe II 8K Flash 256 RAM COM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
CY7C60223-SXC 功能描述:8位微控制器 -MCU Wireless enCoRe II 8K Flash 256 RAM COM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
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