參數(shù)資料
型號(hào)： CY7C60223
廠商： Cypress Semiconductor Corp.
英文描述： Wireless enCoRe II Microcontroller(無線enCoRe II微控制器)
中文描述： 的Wireless enCoRe II微控制器（無線enCoRe II還微控制器）
文件頁數(shù)： 18/62頁
文件大?。?/td> 1276K
代理商： CY7C60223
CY7C601xx
CY7C602xx
Document 38-16016 Rev. *C
Page 18 of 62
EraseAll Function
The EraseAll function performs a series of steps that destroy
the user data in the Flash macros and resets the protection
block in each Flash macro to all zeros (the unprotected state).
The EraseAll function does not affect the three hidden blocks
above the protection block, in each Flash macro. The first of
these four hidden blocks is used to store the protection table
for its eight Kbytes of user data.
The EraseAll function begins by erasing the user space of the
Flash macro with the highest address range. A bulk program
of all zeros is then performed on the same Flash macro, to
destroy all traces of the previous contents. The bulk program
is followed by a second erase that leaves the Flash macro in
a state ready for writing. The erase, program, erase sequence
is then performed on the next lowest Flash macro in the
address space if it exists. Following the erase of the user
space, the protection block for the Flash macro with the
highest address range is erased. Following the erase of the
protection block, zeros are written into every bit of the
protection table. The next lowest Flash macro in the address
space then has its protection block erased and filled with
zeros.
The end result of the EraseAll function is that all user data in
the Flash is destroyed and the Flash is left in an unpro-
grammed state, ready to accept one of the various write
commands. The protection bits for all user data are also reset
to the zero state.
The parameter block values that must be set, besides the
keys, are the CLOCK and DELAY values.
TableRead Function
The TableRead function gives the user access to part-specific
data stored in the Flash during manufacturing. It also returns
a Revision ID for the die (not to be confused with the Silicon
ID).
The table space for the enCoRe II LV is simply a 64-byte row
broken up into eight tables of eight bytes. The tables are
numbered zero through seven. All user and hidden blocks in
the enCoRe II LV parts consist of 64 bytes.
An internal table holds the Silicon ID and returns the Revision
ID. The Silicon ID is returned in SRAM, while the Revision ID
is returned in the CPU_A and CPU_X registers. The Silicon ID
is a value placed in the table by programming the Flash and is
controlled by Cypress Semiconductor Product Engineering.
The Revision ID is hard-coded into the SROM. The Revision
ID is discussed in more detail later in this section.
An internal table holds alternate trim values for the device and
returns a one-byte internal revision counter. The internal
revision counter starts out with a value of zero and is incre-
mented each time one of the other revision numbers is not
incremented. It is reset to zero each time one of the other
revision numbers is incremented. The internal revision count
is returned in the CPU_A register. The CPU_X register will
always be set to FFh when trim values are read. The BLOCKID
value, in the parameter block, is used to indicate which table
should be returned to the user. Only the three least significant
bits of the BLOCKID parameter are used by TableRead
function for the enCoRe II LV. The upper five bits are ignored.
When the function is called, it transfers bytes from the table to
SRAM addresses F8h–FFh.
The M8C’s A and X registers are used by the TableRead
function to return the die’s Revision ID. The Revision ID is a
16-bit value hard-coded into the SROM that uniquely identifies
the die’s design.
Checksum Function
The Checksum function calculates a 16-bit checksum over a
user-specifiable number of blocks, within a single Flash macro
(Bank) starting from block zero. The BLOCKID parameter is
used to pass in the number of blocks to calculate the
checksum over. A BLOCKID value of 1 will calculate the
checksum of only block 0, while a BLOCKID value of 0 will
calculate the checksum of all 256-user blocks. The 16-bit
checksum is returned in KEY1 and KEY2. The parameter
KEY1 holds the lower eight bits of the checksum and the
parameter KEY2 holds the upper eight bits of the checksum.
The checksum algorithm executes the following sequence of
three instructions over the number of blocks times 64 to be
checksummed.
romx
add [KEY1], A
adc [KEY2], 0
Table 27.ProtectBlock Parameters
Name
KEY1
KEY2
Address
0,F8h
0,F9h
Description
3Ah
Stack Pointer value when SSC is
executed
Clock Divider used to set the write
pulse width
For a CPU speed of 12 MHz set to 56h
CLOCK
0,FCh
DELAY
0,FEh
Table 28.EraseAll Parameters
Name
KEY1
KEY2
Address
0,F8h
0,F9h
Description
3Ah
Stack Pointer value when SSC is
executed
Clock Divider used to set the write pulse
width
For a CPU speed of 12 MHz set to 56h
CLOCK
0,FCh
DELAY
0,FEh
Table 29.Table Read Parameters
Name
KEY1
KEY2
Address
0,F8h
0,F9h
Description
3Ah
Stack Pointer value when SSC is
executed
Table number to read
BLOCKID
0,FAh
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參數(shù)描述
CY7C60223-3X14C 制造商:Cypress Semiconductor 功能描述:CY7C60223-3X14C - Bulk 制造商:Cypress Semiconductor 功能描述:USB
CY7C60223-3XWC 制造商:Cypress Semiconductor 功能描述:USB - Bulk 制造商:Cypress Semiconductor 功能描述:Bulk / RF Companion Microcontrollers
CY7C60223-PXC 功能描述:IC MCU 8K WIRELESS 24-DIP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:enCoRe™ II CY7C602xx 標(biāo)準(zhǔn)包裝:60 系列:PSOC® 3 CY8C38xx 核心處理器:8051 芯體尺寸:8-位 速度:67MHz 連通性:EBI/EMI，I²C，LIN，SPI，UART/USART 外圍設(shè)備:電容感應(yīng)，DMA，LCD，POR，PWM，WDT 輸入/輸出數(shù):25 程序存儲(chǔ)器容量:64KB（64K x 8） 程序存儲(chǔ)器類型:閃存 EEPROM 大小:2K x 8 RAM 容量:8K x 8 電壓 - 電源 (Vcc/Vdd):1.71 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 2x20b，D/A 4x8b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:48-VFQFN 裸露焊盤 包裝:托盤
CY7C60223-QXC 功能描述:8位微控制器 -MCU Wireless enCoRe II 8K Flash 256 RAM COM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
CY7C60223-SXC 功能描述:8位微控制器 -MCU Wireless enCoRe II 8K Flash 256 RAM COM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
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