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參數(shù)資料
| 型號： | CY7C1916BV18 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 18-Mbit DDR-II SRAM 2-Word Burst Architecture(2字Burst結(jié)構(gòu),18-Mbit DDR-II SRAM) |
| 中文描述： | 18兆位的DDR - II SRAM的2字突發(fā)架構(gòu)（2字突發(fā)結(jié)構(gòu),18 -兆位的DDR - II SRAM的） |
| 文件頁數(shù)： | 27/28頁 |
| 文件大?。?/td> | 469K |
| 代理商： | CY7C1916BV18 |
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CY7C1316BV18
CY7C1916BV18
CY7C1318BV18
CY7C1320BV18
Document Number: 38-05621 Rev. *C
Cypress Semiconductor Corporation, 2006. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be
used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its
products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
Page 27 of 28
QDR
RAMs and Quad Data Rate
RAMs comprise a new family of products developed by Cypress, Hitachi, IDT, Micron, NEC
and Samsung technology. All product and company names mentioned in this document are the trademarks of their respective
holders.
Package Diagram
A
PIN 1 CORNER
1
13.00±0.10
7
1.00
0.50 (0.25 M C A B
0.25 M0.05 M C
0.05 M C
B
A
0.15(4X)
0
SEATING PLANE
0
0
0
PIN 1 CORNER
TOP VIEW
BOTTOM VIEW
5
6
7
8
9
10
10.00
1
B
C
D
E
F
G
H
J
K
L
M
N
11
11
10
9
8
6
7
5
4
3
2
1
P
R
P
R
K
M
N
L
J
H
G
F
E
D
C
B
A
A
1
13.00±0.10
B
C
1
5.00
0
0.50 (165X)
1
SOLDER PAD TYPE : NON-SOLDER MASK DEFINED (NSMD)
PACKAGE WEIGHT : 0.475g
JEDEC REFERENCE : MO-216 / DESIGN 4.6C
PACKAGE CODE : BB0AC
PACKAGE CODE : BB0AC
51-85180-*A
165 FBGA 13 x 15 x 1.40 MM BB165D/BW165D
165-ball FBGA (13 x 15 x 1.4 mm) (51-85180)
A
1
PIN 1 CORNER
1
13.00±0.10
7
1.00
B
A
0.15(4X)
0
SEATING PLANE
0
0
0
PIN 1 CORNER
TOP VIEW
BOTTOM VIEW
2
3
4
5
6
7
8
9
10
10.00
1
B
C
D
E
F
G
H
J
K
L
M
N
11
11
10
9
8
6
7
5
4
3
2
1
P
R
P
R
K
M
N
L
J
H
G
F
E
D
C
B
A
A
1
13.00±0.10
B
C
1
5.00
0
51-85180-*A
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C1320BV18 | 18-Mbit DDR-II SRAM 2-Word Burst Architecture(2字Burst結(jié)構(gòu),18-Mbit DDR-II SRAM) |
| CY7C1316BV18 | 18-Mbit DDR-II SRAM 2-Word Burst Architecture(2字Burst結(jié)構(gòu),18-Mbit DDR-II SRAM) |
| CY7C1318BV18 | 18-Mbit DDR-II SRAM 2-Word Burst Architecture(2字Burst結(jié)構(gòu),18-Mbit DDR-II SRAM) |
| CY7C192 | 64K x 4 Static RAM with Separate I/O(帶獨(dú)立的輸入/輸出口的64K x 4靜態(tài) RAM) |
| CY7C194B | 256 Kb (64K x 4) Static RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C192-15VCT | 制造商:Cypress Semiconductor 功能描述: |
| CY7C192-15VXC | 功能描述:靜態(tài)隨機(jī)存取存儲器 64Kx4 SEP IO 靜態(tài)隨機(jī)存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C192-15VXCT | 功能描述:靜態(tài)隨機(jī)存取存儲器 64Kx4 SEP IO 靜態(tài)隨機(jī)存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C192-25DMB | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Async Dual 5V 256K-Bit 64K x 4-Bit 25ns 28-Pin CDIP |
| CY7C192-35VC | 制造商:Cypress Semiconductor 功能描述: |
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