參數(shù)資料
型號(hào)： CY7C1446AV33
廠商： Cypress Semiconductor Corp.
英文描述： 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM(36-Mb (1M x 36/2M x 18/512K x 72)管道式同步SRAM)
中文描述： 36兆位（1米x 36/2M x 18/512K × 72）流水線同步靜態(tài)存儲(chǔ)器（36字節(jié)（100萬(wàn)x 36/2M x 18/512K × 72）管道式同步靜態(tài)存儲(chǔ)器）
文件頁(yè)數(shù)： 14/31頁(yè)
文件大小： 531K
代理商： CY7C1446AV33
CY7C1440AV33
CY7C1442AV33
CY7C1446AV33
Document #: 38-05383 Rev. *E
Page 14 of 31
3.3V TAP AC Test Conditions
Input pulse levels ............................................... V
SS
to 3.3V
Input rise and fall times...................... ..............................1ns
Input timing reference levels...........................................1.5V
Output reference levels...................................................1.5V
Test load termination supply voltage...............................1.5V
3.3V TAP AC Output Load Equivalent
2.5V TAP AC Test Conditions
Input pulse levels.................................................V
SS
to 2.5V
Input rise and fall time .....................................................1 ns
Input timing reference levels.........................................1.25V
Output reference levels ................................................1.25V
Test load termination supply voltage ............................1.25V
2.5V TAP AC Output Load Equivalent
Notes:
10.t
and t
refer to the set-up and hold time requirements of latching data from the boundary scan register.
11.Test conditions are specified using the load in TAP AC test Conditions. t
R
/t
F
= 1 ns.
TAP AC Switching Characteristics
Over the operating Range
[10, 11]
Parameter
Clock
t
TCYC
t
TF
t
TH
t
TL
Output Times
t
TDOV
t
TDOX
Set-up Times
t
TMSS
t
TDIS
t
CS
Hold Times
t
TMSH
t
TDIH
t
CH
Description
Min.
Max.
Unit
TCK Clock Cycle Time
TCK Clock Frequency
TCK Clock HIGH time
TCK Clock LOW time
50
ns
MHz
ns
ns
20
20
20
TCK Clock LOW to TDO Valid
TCK Clock LOW to TDO Invalid
10
ns
ns
0
TMS Set-up to TCK Clock Rise
TDI Set-up to TCK Clock Rise
Capture Set-up to TCK Rise
5
5
5
ns
ns
ns
TMS Hold after TCK Clock Rise
TDI Hold after Clock Rise
Capture Hold after Clock Rise
5
5
5
ns
ns
ns
TDO
1.5V
20pF
Z = 50
50
TDO
1.25V
20pF
Z = 50
50
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY7C1446V33-167AC 制造商:Cypress Semiconductor 功能描述:SRAM SYNC SGL 3.3V 36MBIT 512KX72 3.5NS 100TQFP - Bulk
CY7C1447AV25-133BGI 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 36MB (512Kx72) 2.5v 133MHz 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
CY7C144AV-20AC 制造商:Cypress Semiconductor 功能描述:SRAM Chip Async Dual 3.3V 64K-Bit 8K x 8 20ns 64-Pin TQFP
CY7C144AV-25AC 功能描述:IC SRAM 64KB DUAL 64-TQFP RoHS:否 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲(chǔ)器:EEPROMs - 串行 存儲(chǔ)器類型:EEPROM 存儲(chǔ)容量:4K (512 x 8) 速度:400kHz 接口:I²C，2 線串口 電源電壓:2.7 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-SOIC（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:8-MFP 包裝:帶卷 (TR)
CY7C144AV-25ACKJ 制造商:Cypress Semiconductor 功能描述:
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