參數(shù)資料
型號(hào): CY3930V484-125BBC
廠商: Cypress Semiconductor Corp.
英文描述: CPLDs at FPGA Densities
中文描述: CPLD器件在FPGA的密度
文件頁數(shù): 81/86頁
文件大?。?/td> 1212K
代理商: CY3930V484-125BBC
Delta39K ISR
CPLD Family
Document #: 38-03039 Rev. *H
Page 82 of 86
T10
VCCCNFG
T11
Config_Done
T12
IO2
T13[19]
IO2
T14[19]
IO3
T15
IO3
T16
IO3
T17
IO4
T18
IO/VREF4
T19
VCCIO4
T20
VCC
T21
IO4
T22
IO/VREF4
T23
NC
VCCIO4
T24
NC
IO/VREF4
T25
NC
T26
NC
U1
NC
U2
NC
U3
NC
IO1
U4
NC
IO1
U5
IO1
U6
IO1
U7
IO1
U8
IO1
U9
Data
U10
Reconfig
U11
IO2
U12
IO2
U13[19]
IO2
U14[19]
IO3
U15
IO3
U16
IO3
U17
IO3
U18
IO4
U19
IO4
U20
IO4
U21
IO4
U22
IO4
U23
NC
IO4
U24
NC
IO4
U25
NC
U26
NC
V1
NC
Table 15. 676 FBGA Pin Table (continued)
Pin
CY39100
CY39165
CY39200
V2
NC
V3
NC
IO1
V4
IO1
V5
IO1
V6
IO/VREF1
V7
IO1
V8
IO1
V9
GND
V10
MSEL
V11
IO/VREF2
V12
IO/VREF2
V13[19]
IO2
V14[19]
IO3
V15
IO/VREF3
[20]
IO/VREF3
V16
IO/VREF3
V17
IO3
V18
GND
V19
IO4
V20
IO4
V21
IO/VREF4
V22
IO4
V23
IO4
V24
NC
IO4
V25
NC
V26
NC
W1
NC
W2
NC
W3
NC
IO1
W4
IO1
W5
IO1
W6
IO1
W7
IO1
W8
GND
W9
CCE
W10
IO2
W11
VCCIO2
W12
VCCIO2
W13
IO2
W14
IO2
W15
VCCIO3
W16
VCCIO3
W17
IO3
W18
IO3
W19
GND
Table 15. 676 FBGA Pin Table (continued)
Pin
CY39100
CY39165
CY39200
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