參數(shù)資料
型號: CY28441ZXC
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: XO, clock
英文描述: Clock Generator for Intel Alviso Chipset
中文描述: 133 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
封裝: 6 X 12 MM, LEAD FREE, MO-153, TSSOP2-56
文件頁數(shù): 14/20頁
文件大小: 261K
代理商: CY28441ZXC
CY28441
Document #: 38-07679 Rev. **
Page 14 of 20
Absolute Maximum Conditions
Parameter
V
DD
V
DD_A
V
IN
T
S
T
A
T
J
JC
JA
ESD
HBM
UL-94
MSL
Multiple Supplies:
The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing
is NOT required.
Description
Condition
Min.
–0.5
–0.5
–0.5
–65
0
2000
Max.
4.6
4.6
V
DD
+ 0.5
150
85
150
39.56
45.29
V–0
1
Unit
V
V
VDC
°C
°C
°C
°C/W
°C/W
V
Core Supply Voltage
Analog Supply Voltage
Input Voltage
Temperature, Storage
Temperature, Operating Ambient
Temperature, Junction
Dissipation, Junction to Case
Dissipation, Junction to Ambient
ESD Protection (Human Body Model)
Flammability Rating
Moisture Sensitivity Level
Relative to V
SS
Non-functional
Functional
Functional
Mil-STD-883E Method 1012.1
JEDEC (JESD 51)
MIL-STD-883, Method 3015
At 1/8 in.
DC Electrical Specifications
Parameter
VDD_A
,
VDD_REF,
VDD_PCI,
VDD_3V66,
VDD_48,
VDD_CPU
V
ILI2C
V
IHI2C
V
IL_FS
Description
Condition
Min.
3.135
Max.
3.465
Unit
V
3.3V Operating Voltage
3.3 ± 5%
Input Low Voltage
Input High Voltage
FS_A/FS_B/FS_C Input Low
Voltage
FS_A/FS_B/FS_C Input High
Voltage
3.3V Input Low Voltage
3.3V Input High Voltage
Input Low Leakage Current
Input High Leakage Current
3.3V Output Low Voltage
3.3V Output High Voltage
High-impedance Output Current
Input Pin Capacitance
Output Pin Capacitance
Pin Inductance
Xin High Voltage
Xin Low Voltage
Dynamic Supply Current
Power-down Supply Current
Power-down Supply Current
SDATA, SCLK
SDATA, SCLK
1.0
0.35
V
V
V
2.2
V
SS
– 0.3
V
IH_FS
0.7
V
DD
+ 0.5
V
V
IL
V
IH
I
IL
I
IH
V
OL
V
OH
I
OZ
C
IN
C
OUT
L
IN
V
XIH
V
XIL
I
DD3.3V
I
PD3.3V
I
PD3.3V
V
SS
– 0.5
2.0
–5
2.4
–10
2
3
0.7V
DD
0
0.8
V
V
μ
A
μ
A
V
V
μ
A
pF
pF
nH
V
V
mA
mA
mA
V
DD
+ 0.5
5
0.4
10
5
6
7
V
DD
0.3V
DD
380
70
2
Except internal pull-up resistors, 0 < V
IN
< V
DD
Except internal pull-down resistors, 0 < V
IN
< V
DD
I
OL
= 1 mA
I
OH
= –1 mA
At max. load and freq. per
Figure 15
PD asserted, Outputs driven
PD asserted, Outputs Hi-Z
相關(guān)PDF資料
PDF描述
CY28441ZXCT Clock Generator for Intel Alviso Chipset
CY29653 3.3V 125-MHz 8-Output Zero Delay Buffer(3.3V, 125MHz, 8輸出零延遲緩沖器)
CY29774 2.5V or 3.3V, 125-MHz, 14 Output Zero Delay Buffer(2.5V/3.3V, 125MHz, 14輸出零延遲緩沖器)
CY29942AC 2.5V or 3.3V, 200-MHz, 1:18 Clock Distribution Buffer
CY29942AI 2.5V or 3.3V, 200-MHz, 1:18 Clock Distribution Buffer
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY28441ZXCT 功能描述:IC CLOCK GEN ALVISO 56-TSSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:- 標準包裝:1,500 系列:- 類型:時鐘緩沖器/驅(qū)動器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP(0.209",5.30mm 寬) 供應商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT
CY28442 制造商:SPECTRALINEAR 制造商全稱:SPECTRALINEAR 功能描述:Clock Generator for Intel Alviso Chipset
CY28442-2 制造商:SPECTRALINEAR 制造商全稱:SPECTRALINEAR 功能描述:Clock Generator for Intel Alviso Chipset
CY28442-2_05 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Clock Generator for Intel Alviso Chipset
CY28442ZXC 功能描述:IC CLOCK GEN ALVISO 56-TSSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器,PLL,頻率合成器 系列:- 產(chǎn)品變化通告:Product Discontinuation 04/May/2011 標準包裝:96 系列:- 類型:時鐘倍頻器,零延遲緩沖器 PLL:帶旁路 輸入:LVTTL 輸出:LVTTL 電路數(shù):1 比率 - 輸入:輸出:1:8 差分 - 輸入:輸出:無/無 頻率 - 最大:133.3MHz 除法器/乘法器:是/無 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP(0.173",4.40mm 寬) 供應商設(shè)備封裝:16-TSSOP 包裝:管件 其它名稱:23S08-5HPGG