參數(shù)資料
型號(hào)： CXK77P18L80AGB-4A
元件分類(lèi)： SRAM
英文描述： 512K X 18 LATE-WRITE SRAM, 3.8 ns, PBGA119
封裝： 14 X 22 MM, 1.27 MM PITCH, PLASTIC, BGA-119
文件頁(yè)數(shù)： 18/25頁(yè)
文件大?。?/td> 269K
代理商： CXK77P18L80AGB-4A
SONY
CXK77P36L80AGB / CXK77P18L80AGB
Preliminary
8Mb LW R-L, rev 1.1
25 / 25
May 22, 2002
Revision History
Rev. #
Rev. date
Description of Modification
rev 0.0
07/18/00
Initial Version
rev 1.0
11/03/00
1. Modified DC Recommended Operating Conditions (p. 7).
Removed Single-Ended clock support.
Removed Clock Input Cross Point Voltage (VX) specification.
VMIH (min)
VREF + 0.3V to 1.3V
VMIL (max)
VREF - 0.3V to 0.4V
VCM (max)
1.1V to 1.3V
2. Modified DC Electrical Characteristics (p. 8).
Combined IDD specifications for each speed bin into one specification for all speed bins.
Removed IDD3 specification.
3. Modified AC Electrical Characteristics (p. 9).
Added note 2 regarding Address, Write Enables, Synchronous Select, and Data Input Hold
Times that states “these parameters are measured from VREF ± 200mV to the clock mid-
point”.
4. Modified JTAG DC Recommended Operating Conditions (p. 16).
VTOH (min) at ITOH = -100uA
2.7V to 2.6V
VTOH (min) at ITOH = -8mA
2.4V to 2.3V
5. Added BGA Package Marking (p. 25).
rev 1.1
05/22/02
1. Modified DC Recommended Operating Conditions (p. 7).
VDDQ (min)
1.7V to 1.4V
VDDQ (max)
1.9V to 1.6V
VREF (min)
0.7V to 0.65V
VREF (max)
1.0V to 0.85V
VCM (min)
0.7V to 0.9V
2. Modified DC Electrical Characteristics (p. 8).
ROUT (min)
RQ/5
10% to RQ/5 - 18%
ROUT (max)
RQ/5
+ 10% to RQ/5 + 12%
3. Modified AC Electrical Characteristics (p. 9).
Removed Output Enable Setup and Hold Time specifications.
4. Removed AC Electrical Characteristics note regarding tKHQZ spec when tKHQV ≤ 3.8ns.
5. Removed 1.9V VDDQ AC Test Conditions.
6. Added 1.5V VDDQ AC Test Conditions (p. 10).
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參數(shù)描述
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CXK77P36E160GB-42E 制造商:SONY 制造商全稱(chēng):Sony Corporation 功能描述:16Mb LW R-L HSTL High Speed Synchronous SRAMs (512K x 36 or 1M x 18)
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