參數(shù)資料
型號： CP2201-GM
廠商： Silicon Laboratories Inc
文件頁數(shù)： 85/108頁
文件大?。?/td> 0K
描述： IC ETH CTRLR SNGL-CHIP 28QFN
標(biāo)準(zhǔn)包裝： 73
控制器類型： 以太網(wǎng)控制器，MAC/10Base-T
接口： 并行/串行
電源電壓： 3.1 V ~ 3.6 V
電流 - 電源： 75mA
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 28-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 28-QFN（5x5）
包裝： 管件
產(chǎn)品目錄頁面： 627 (CN2011-ZH PDF)
配用： 336-1326-ND - KIT REF DESIGN PWR OVER ETHERNET
336-1316-ND - KIT EVAL FOR CP2201 ETH CTRLR
其它名稱： 336-1313
CP2200/1
78
Rev. 1.0
14. Media Access Controller (MAC)
The CP2200/1 has an IEEE 802.3 compliant Ethernet Media Access Controller (MAC). The MAC can be
configured to automatically pad short frames (full duplex mode only), append CRC, and perform frame length
checking. A loopback mode separate from PHY loopback is also provided for system debugging. The MAC is
configured through nine indirect 16-bit registers summarized in Table 20.
14.1. Initializing the MAC
MAC initialization occurs after the physical layer initialization and typically occurs once after each reset or Auto-
Negotiation Complete interrupt. Most MAC indirect registers can be left at their reset values. See “6.2. Reset
Initialization” on page 18 for the complete reset initialization procedure. The following are the steps required to
initialize the MAC:
Step 1: Determine if the physical layer is set to full-duplex or half-duplex. The MAC must be set to the same
duplex mode as the physical layer before sending or receiving any packets.
Step 2: Write 0x40B3 (full-duplex) or 0x4012 (half-duplex) to MACCF. The appropriate bits in this register
may also be set or cleared to change padding options or MAC behavior.
Step 3: Write 0x0015 (full-duplex) or 0x0012 (half-duplex) to IPGT.
Step 4: Write 0x0C12 to IPGR.
Step 5: Write 0x05EE to MAXLEN.
Step 6: Program the 48-bit Ethernet MAC Address by writing to MACAD0:MACAD1:MACAD2.
Step 7: Write 0x0001 to MACCN to enable reception. If loopback mode or flow control is desired, set the
appropriate bits to enable these functions.
14.2. Accessing the Indirect MAC Registers
The indirect MAC registers are accessed through four direct mapped registers: MACADDR, MACDATAH,
MACDATAL, and MACRW. The MAC registers can be accessed using the following procedure:
Step 1: Write the address of the indirect register to MACADDR.
Step 2: If writing a value to the indirect register, write a 16-bit value to MACDATAH:MACDATAL.
Step 3: Write any value to MACRW to transfer the contents of MACDATAH:MACDATAL to the indirect
register.
Step 4: Perform a read on MACRW to transfer the contents of the indirect register to
MACDATAH:MACDATAL. The MACDATAH and MACDATAL registers may now be directly read to
determine the contents of the indirect register.
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